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* rcar-3.9.4/dts-rcar-gen3.rc1:
arm64: dts: r8a7796-salvator-xs-2x4g: Disable HS400
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In R-Car M3 Ver.3.0, SDHI has HW restrictions on HS400 mode.
Therefore, delete the 'mmc-hs400-1_8v' property and disable HS400 mode.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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* rcar-3.9.4/thermal.rc1:
thermal: rcar_gen3_thermal: fix interrupt type
thermal: rcar_gen3_thermal: Fix init value of IRQCTL register
thermal: rcar_gen3_thermal: disable interrupt in .remove
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Currently IRQF_SHARED type interrupt line is allocated, but it
is not appropriate, as the interrupt line isn't shared between
different devices, instead IRQF_ONESHOT is the proper type.
By changing interrupt type to IRQF_ONESHOT, now irq handler is
no longer needed, as clear of interrupt status can be done in
threaded interrupt context.
Because IRQF_ONESHOT type interrupt line is kept disabled until
the threaded handler has been run, so there is no need to protect
read/write of REG_GEN3_IRQSTR with lock.
Fixes: 7d4b269776ec6 ("enable hardware interrupts for trip points")
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from commit 2c0928c9e004589dc9e7672c40a38d6c4ca12701)
Signed-off-by: The Kinh Nguyen <the.nguyen.vx@renesas.com>
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Fix setting value for IRQCTL register. We are setting the last 6 bits
of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according
to Hardware manual values 1 are "setting prohibited" for Gen3.
Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from commit ed1b1ac1425b3d4399553411f305ce12fb3a6c54)
Signed-off-by: The Kinh Nguyen <the.nguyen.vx@renesas.com>
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Currently IRQ remains enabled after .remove, later if device is probed,
IRQ is requested before .thermal_init, this may cause IRQ function be
called before device is initialized.
this patch disables interrupt in .remove, to ensure irq function
only be called after device is fully initialized.
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from commit 63f55fcea50c25ae5ad45af92d08dae3b84534c2)
Signed-off-by: The Kinh Nguyen <the.nguyen.vx@renesas.com>
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* rcar-3.9.4/ehci_ohci.rc1:
phy: rcar-gen3-usb2: Correct VBUS behavior at over-current
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When VBCTRL.OCCLREN is set, VBCTRL.VBOUT and ADPCTRL.DRVVBUS
are automatically cleared when an over-current occurs.
On OTG channels, clearing these bits will turn off VBUS
so device will appear to be disconnected on the bus.
Clearing VBCTRL.OCCLREN will resolve this issue by retaining VBUS status.
USB port is able to be recovered automatically and the device can be
connected again.
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
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* rcar-3.9.4/iommu-ipmmu-vmsa.rc2:
iommu/ipmmu-vmsa: Remove cache snoop transaction for page table walk request
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According to Hardware Manual Errata on Apr. 10, 2019, cache snoop
transaction for page table walk request is not supported on R-Car Gen3.
Hence, this patch removes these fields since setting them up in IMTTBCR
register will have no effect.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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* rcar-3.9.4/sd_mmc.rc4:
mmc: tmio: fix SCC error handling to avoid false positive CRC error
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If an SCC error occurs during a read/write command execution, a false
positive CRC error message is output.
mmcblk0: response CRC error sending r/w cmd command, card status 0x900
check_scc_error() checks SCC_RVSREQ.RVSERR bit. RVSERR detects a
correction error in the next (up or down) delay tap position. However,
since the command is successful, only retuning needs to be executed.
This has been confirmed by HW engineers.
Thus, on SCC error, set retuning flag instead of setting an error code.
Fixes: b85fb0a1c8ae ("mmc: tmio: Fix SCC error detection")
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: updated comment and commit message, removed some braces]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 51b72656bb39fdcb8f3174f4007bcc83ad1d275f)
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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* rcar-3.9.4/dmae.rc1:
dmaengine: sh: rcar-dmac: With cyclic DMA residue 0 is valid
Revert "dmaengine: sh: rcar-dmac: With cyclic DMA residue 0 is valid"
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Having a cyclic DMA, a residue 0 is not an indication of a completed
DMA. In case of cyclic DMA make sure that dma_set_residue() is called
and with this a residue of 0 is forwarded correctly to the caller.
Fixes: 3544d2878817 ("dmaengine: rcar-dmac: use result of updated get_residue in tx_status")
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Achim Dahlhoff <Achim.Dahlhoff@de.bosch.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Yao Lihua <ylhuajnu@outlook.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: <stable@vger.kernel.org> # v4.8+
Signed-off-by: Vinod Koul <vkoul@kernel.org>
(cherry picked from commit 907bd68a2edc491849e2fdcfe52c4596627bca94)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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This reverts commit 0c7a66e6849d205d4443ee7d8bdd39c43e0e36e1.
Link: https://patchwork.kernel.org/patch/10839055/
It included NULL access problem, therefore revert it.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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* rcar-3.9.4/audio.rc2:
ASoC: rsnd: fixup 6ch settings to 8ch
ASoC: rsnd: src: Avoid a potential deadlock
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rsnd need to use 8ch clock settings for 6ch for TDM.
Otherwise, it can't work correctly.
This patch fixup it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 66287def435315d9d8de740da4c543e37630b897)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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lockdep warns us that priv->lock and k->k_lock can cause a
deadlock when after acquire of k->k_lock, process is interrupted
by src, while in another routine of src .init, k->k_lock is
acquired with priv->lock held.
This patch avoids a potential deadlock by not calling soc_device_match()
in SRC .init callback, instead it adds new soc fields in priv->flags to
differentiate SoCs.
Fixes: linux-next commit 7674bec4fc09 ("ASoC: rsnd: update BSDSR/BSDISR handling")
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit ba164a49f8f7390b036713bf8a70a150a938c670)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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This patch enables the IPMMU of SDHI3 used as an eMMC port on Ebisu and
Ebisu-4D boards.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables the IPMMU of SDHI2 used as an eMMC port on Salvator
board.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This reverts commit 4bd36fe168284318c1091e998e7aa8351ff34528.
Multiple IPMMUs can not be operated simultaneously due to H3 Ver.1.x and
H3 Ver.2.0 hardware restriction.
As a result, this reverts commit 4bd36fe16828 ("arm64: dts: r8a7795:
Connect SDHI to IPMMU-DS1") to keep IPMMU for SDHI{0..3} is disabled by
default.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This reverts commit 6ea36b7fb2cbf0b4ab5cf0d743de64a833468886.
Multiple IPMMUs can not be operated simultaneously due to M3 Ver.1.x
hardware restriction.
As a result, this reverts commit 6ea36b7fb2cb ("arm64: dts: r8a7796:
Connect SDHI to IPMMU-DS1") to keep IPMMU for SDHI{0..3} is disabled by
default.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This reverts commit 21258b113ddea10592c3c90979f269bd31bd0622.
Multiple IPMMUs can not be operated simultaneously due to H3 Ver.1.x,
H3 Ver.2.0, M3 Ver.1.x hardware restriction.
M3-N has no similar hardware restriction, but disables IPMMU for SoCs
that have hardware restriction.
As a result, This reverts commit 21258b113dde ("arm64: dts: r8a77965:
Connect SDHI to IPMMU-DS1") to keep IPMMU for SDHI{0..3} is disabled by
default.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This reverts commit 2cdef56231d3098a413528456fb958d236f82937.
Multiple IPMMUs can not be operated simultaneously due to H3 Ver.1.x,
H3 Ver.2.0, M3 Ver.1.x hardware restriction.
E3 has no similar hardware restriction, but disables IPMMU for SoCs
that have hardware restriction.
As a result, This reverts commit 2cdef56231d3 ("arm64: dts: r8a77990:
Connect SDHI to IPMMU-DS1") to keep IPMMU for SDHI{0,1,3} is disabled by
default.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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According to eMMC specification, we should issue CMD1 repeatidly in
the idle state until the eMMC is ready even if the mmc_attach_mmc()
calls this function with ocr = 0. Otherwise some eMMC devices seems
to enter the inactive mode after mmc_init_card() issued CMD0 when
the eMMC device is busy.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Patchwork: https://patchwork.kernel.org/patch/10874621/
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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* rcar-3.9.2/dts-rcar-gen3.rc4:
arm64: dts: r8a77990-ebisu{,-es10}: Add no-sdio and no-sd properties to SDHI3
arm64: dts: salvator-common: Add no-sdio and no-sd properties to SDHI2
arm64: dts: r8a77990: Enable IPMMU-DS1 and IPMMU-MM
arm64: dts: r8a77965: Enable IPMMU-DS1 and IPMMU-MM
arm64: dts: r8a7796: Enable IPMMU-DS1 and IPMMU-MM
arm64: dts: r8a7795: Enable IPMMU-DS1 and IPMMU-MM
arm64: dts: r8a77990: Connect SDHI to IPMMU-DS1
arm64: dts: r8a77965: Connect SDHI to IPMMU-DS1
arm64: dts: r8a7796: Connect SDHI to IPMMU-DS1
arm64: dts: r8a7795: Connect SDHI to IPMMU-DS1
Revert "arm64: dts: renesas: r8a7795: Tie Audio-DMAC to IPMMU-MP0/1"
Revert "arm64: dts: renesas: r8a7796: Tie Audio-DMAC to IPMMU-MP"
Revert "arm64: dts: renesas: r8a7795: Tie SYS-DMAC to IPMMU-DS0/1"
Revert "arm64: dts: renesas: r8a7796: Tie SYS-DMAC to IPMMU-DS0/1"
Revert "arm64: dts: renesas: r8a77965: Attach the SYS-DMAC to the IPMMU"
Revert "arm64: dts: renesas: r8a77990: Attach the SYS-DMAC to the IPMMU"
Revert "arm64: dts: r8a77965: Tie Audio-DMAC to IPMMU-MP"
Revert "arm64: dts: r8a77990: Tie Audio-DMAC to IPMMU-MP"
arm64: dts: r8a7796-m3ulcb: Select the device tree of R-Car M3 ES1.x.
arm64: dts: r8a77965-m3nulcb: Fix source clock for DU
arm64: dts: r8a77965-m3nulcb: Add VSPM I/F driver node
arm64: dts: r8a77965-m3nulcb: Add MMNGRBUF driver node
arm64: dts: r8a77965-m3nulcb: Add MMNGR support
arm64: dts: r8a77965-m3nulcb: Add reserved mem for MMNGR
arm64: dts: renesas: r8a77965: m3nulcb: Initial device tree
dt-bindings: arm: Document Renesas R-Car M3-N-based ULCB board
arm64: dts: r8a7796: Add support for R-Car M3 ES3.0
arm64: dts: r8a77965: Fix power domain for FCPCS
arm64: dts: r8a77990: Fix SCIF5 DMA channels
arm64: dts: r8a7795: Fix clock, reset and power domain for iVDP1C
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Add the 'no-sdio' and 'no-sd' properties to the SDHI3 node used as the
eMMC port on Ebisu and Ebisu-4D boards. It will limits the send sdio and
sd cmd during mmc initialization.
In addition, the 'no-sdio' property uses multiple SG entries when SDHI
internal DMAC with IOMMU is enabled. This can improve performance.
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Add the 'no-sdio' and 'no-sd' properties to the SDHI2 node used as the
eMMC port on Salvator board. It will limits the send sdio and sd cmd
during mmc initialization.
In addition, the 'no-sdio' property uses multiple SG entries when SDHI
internal DMAC with IOMMU is enabled. This can improve performance.
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Enable the r8a77990 device nodes for IPMMU-DS1 and the shared IPMMU-MM
device.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Enable the r8a77965 device nodes for IPMMU-DS1 and the shared IPMMU-MM
device.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Enable the r8a7796 device nodes for IPMMU-DS1 and the shared IPMMU-MM
device.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Enable the r8a7795 device nodes for IPMMU-DS1 and the shared IPMMU-MM
device.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Add IPMMU-DS1 to the SDHI device node.
Signed-off-by: Phat Pham <phat.pham.zg@rvc.renesas.com>
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Add IPMMU-DS1 to SDHI device node.
Signed-off-by: Phat Pham <phat.pham.zg@rvc.renesas.com>
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Add IPMMU-DS1 to the SDHI device node.
Signed-off-by: Phat Pham <phat.pham.zg@rvc.renesas.com>
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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Add IPMMU-DS1 to the SDHI device node.
Signed-off-by: Phat Pham <phat.pham.zg@rvc.renesas.com>
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 2a8ae102ed215806c7ca867e0a4522136d68d40e
to keep the IPMMU address translation for Audio-DMAC is disabled
by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 8f7fa3f36dfb3538f651f3b80830e3f0c1f48c79
to keep IPMMU address translation for Audio-DMAC is disabled
by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit bfa8f11e3f95f32620edae00277a23197a50c77a
to keep IPMMU address translation for SYS-DMAC0, SYS-DMAC1 and
SYS-DMAC2 is disabled by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 2e7dfb1a9bf06af94f4da60ada829260308e2f1b
to keep IPMMU address translation for SYS-DMAC0, SYS-DMAC1 and
SYS-DMAC2 is disabled by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit fee499aca1b44e5a2f7d6937ab0f42afdee5a8dc
to keep IPMMU address translation for SYS-DMAC0, SYS-DMAC1 and
SYS-DMAC2 is disabled by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit b7b0f8ae1531ee00528797bb728a6ef93db2ceb3
to keep IPMMU address translation for SYS-DMAC0, SYS-DMAC1 and
SYS-DMAC2 is disabled by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 7108e015aabd8d56707622b1b9676ee9ef84e32f
to keep IPMMU address translation for Audio-DMAC is disabled
by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit eb7141f4463f52e72ebda5513ea8ce1229d3e23c
to keep IPMMU address translation for Audio-DMAC is disabled
by default.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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The device tree of R-Car M3 was divided into ES1.x and ES3.0.
M3ULCB is equipped with ES1.0 SoC.
So, this patch selects the device tree of ES1.x.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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ULCB Versaclock default output clock is based on its ROM code,
and ULCB case is 33HMz.
But current DT is missing such information, and Versaclock driver
can't handle it today.
We need to update Versaclock driver to handle it correctly.
But as Quick-Hack, this patch indicates it via versaclock5_out3
temporally.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Add VSP Manager I/F driver node for M3NULCB board on R8A77965 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGRBUF external kernel module for M3NULCB board
on R8A77965 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGR external kernel module for M3NULCB board on
R8A77965 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds reserved memory regions:
- Lossy Decompression
48 MiB : 0x0054000000 -> 0x0056ffffff
- Default CMA area
400 MiB : 0x0057000000 -> 0x006fffffff
- CMA area for MMP
256 MiB : 0x0070000000 -> 0x007fffffff
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Allow the bare M3-N-based ULCB board to boot.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 83ff28c74b525aa33f42b829538017d3e8658e69)
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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In harmony with ATF and U-Boot outputs [1] and [2], the new board is
based on M3-N revision ES1.1 and the amount of memory present on SiP
is 2GiB, contiguously addressed.
The amount of RAM is mentioned based on the assumption that it is
encoded in the board id/string. There is some evidence supporting this
in form of last-digit-mismatch between two R-Car H3 ES2.0 ULCB board
ids, one with 4GiB and one with 8GiB of RAM (see [3]).
[1] BL2: R-Car Gen3 Initial Program Loader(CA57) Rev.1.0.21
BL2: PRR is R-Car M3N Ver.1.1
[2] U-Boot 2015.04-00295-*
CPU: Renesas Electronics R8A77965 rev 1.1
---8<----
DRAM: 1.9 GiB
Bank #0: 0x048000000 - 0x0bfffffff, 1.9 GiB
---8<----
[3] https://patchwork.kernel.org/patch/10555957/#22169325
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 43bcac2396f7874338016d3c6d86d0bdad8e63e8)
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Update r8a7796.dtsi so it corresponds to R-Car M3 ES3.0 or later:
- The FCPCI0 module do not exist in ES3.0, the device node is deleted.
- The FCPCS module power domain is changed from A3VC to A2VC1.
- The iVDP1C module clock supply and software reset register bits using
CPG changed from bit28 to bit30.
- The iVDP1C module power domain is changed from A2VC0 to A2VC1.
- The VDPB module power domain is changed from A2VC0 to A2VC1.
Move support for ES1.x revision R-Car M3 SoC separate into
r8a7796-es1.dtsi.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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In R-Car Gen3 Hardware Manual Rev 1.50, the power domain of FCPCS module
was A3VC on R-Car M3N. However, this power domain is A2VC1 correctly.
NOTE: This information will be reflected in the R-Car Gen3 Hardware
Manual in the future.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the DMA channels support for SCIF5 is modified from 16..47
to 0..15 on R-Car E3.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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|
According to the R-Car Gen3 Hardware Manual Rev 1.50, the module clock
status, module clock control, and reset control bit of the iVDP1C module
on R-Car H3 ES2.0 or later was changed from bit28 to bit30. And the power
domain of the iVDP1C module was changed from A2VC0 to A2VC1.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
|
* rcar-3.9.2/bd9571MWV.rc4:
mfd: bd9571mwv: Clean up the BD9574MWF register mapping
mfd: bd9571mwv: Enable GPIO support for PMIC BD9574MWF
mfd: bd9571mwv: fix section mismatch
mfd: bd9571mwv: Add support for BD9574MWF
mfd: bd9571mwv: Make the driver more generic
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|
This patch cleans up the mapped registers which is not used
during BD9574MWF PMIC operation.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
|
|
The BD9574MWF supports small PMIC GPIO block.
This patch enables GPIO control for that block.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
|
|
1. Fix issue build warning "section mismatch"
2. Add some comments to make more clearly
Signed-off-by: Nam Dang <nam.dang.uw@rvc.renesas.com>
|
|
The new PMIC BD9574MWF inherits features from BD9571MWV.
Add the support of new PMIC to existing bd9571mwv driver.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
|
|
Since the driver supports BD9571MWV PMIC only,
this patch makes the functions and data structure become more generic
so that it can support other PMIC variants as well.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
|
|
* rcar-3.9.2/iommu-ipmmu-vmsa.rc3:
driver core: Postpone DMA tear-down until after devres release
iommu/ipmmu-vmsa: Fix memory leak when adding master device
iommu/ipmmu-vmsa: Allow PCI Host controller to be a proxy for all connected PCI devices
iommu/ipmmu-vmsa: Bypass whitelist check for unsupported SoCs
iommu/ipmmu-vmsa: Support suspend/resume by default
|
|
From upstream commit 376991db4uuu ('driver core: Postpone DMA tear-down
until after devres release')
When unbinding the (IOMMU-enabled) R-Car SATA device on Salvator-XS
(R-Car H3 ES2.0), in preparation of rebinding against vfio-platform for
device pass-through for virtualization:
echo ee300000.sata > /sys/bus/platform/drivers/sata_rcar/unbind
the kernel crashes with:
Unable to handle kernel paging request at virtual address ffffffbf029ffffc
Mem abort info:
ESR = 0x96000006
Exception class = DABT (current EL), IL = 32 bits
SET = 0, FnV = 0
EA = 0, S1PTW = 0
Data abort info:
ISV = 0, ISS = 0x00000006
CM = 0, WnR = 0
swapper pgtable: 4k pages, 39-bit VAs, pgdp = 000000007e8c586c
[ffffffbf029ffffc] pgd=000000073bfc6003, pud=000000073bfc6003, pmd=0000000000000000
Internal error: Oops: 96000006 [#1] SMP
Modules linked in:
CPU: 0 PID: 1098 Comm: bash Not tainted 5.0.0-rc5-salvator-x-00452-g37596f884f4318ef #287
Hardware name: Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+ (DT)
pstate: 60400005 (nZCv daif +PAN -UAO)
pc : __free_pages+0x8/0x58
lr : __dma_direct_free_pages+0x50/0x5c
sp : ffffff801268baa0
x29: ffffff801268baa0 x28: 0000000000000000
x27: ffffffc6f9c60bf0 x26: ffffffc6f9c60bf0
x25: ffffffc6f9c60810 x24: 0000000000000000
x23: 00000000fffff000 x22: ffffff8012145000
x21: 0000000000000800 x20: ffffffbf029fffc8
x19: 0000000000000000 x18: ffffffc6f86c42c8
x17: 0000000000000000 x16: 0000000000000070
x15: 0000000000000003 x14: 0000000000000000
x13: ffffff801103d7f8 x12: 0000000000000028
x11: ffffff8011117604 x10: 0000000000009ad8
x9 : ffffff80110126d0 x8 : ffffffc6f7563000
x7 : 6b6b6b6b6b6b6b6b x6 : 0000000000000018
x5 : ffffff8011cf3cc8 x4 : 0000000000004000
x3 : 0000000000080000 x2 : 0000000000000001
x1 : 0000000000000000 x0 : ffffffbf029fffc8
Process bash (pid: 1098, stack limit = 0x00000000c38e3e32)
Call trace:
__free_pages+0x8/0x58
__dma_direct_free_pages+0x50/0x5c
arch_dma_free+0x1c/0x98
dma_direct_free+0x14/0x24
dma_free_attrs+0x9c/0xdc
dmam_release+0x18/0x20
release_nodes+0x25c/0x28c
devres_release_all+0x48/0x4c
device_release_driver_internal+0x184/0x1f0
device_release_driver+0x14/0x1c
unbind_store+0x70/0xb8
drv_attr_store+0x24/0x34
sysfs_kf_write+0x4c/0x64
kernfs_fop_write+0x154/0x1c4
__vfs_write+0x34/0x164
vfs_write+0xb4/0x16c
ksys_write+0x5c/0xbc
__arm64_sys_write+0x14/0x1c
el0_svc_common+0x98/0x114
el0_svc_handler+0x1c/0x24
el0_svc+0x8/0xc
Code: d51b4234 17fffffa a9bf7bfd 910003fd (b9403404)
---[ end trace 8c564cdd3a1a840f ]---
While I've bisected this to commit e8e683ae9a736407 ("iommu/of: Fix
probe-deferral"), and reverting that commit on post-v5.0-rc4 kernels
does fix the problem, this turned out to be a red herring.
On arm64, arch_teardown_dma_ops() resets dev->dma_ops to NULL.
Hence if a driver has used a managed DMA allocation API, the allocated
DMA memory will be freed using the direct DMA ops, while it may have
been allocated using a custom DMA ops (iommu_dma_ops in this case).
Fix this by reversing the order of the calls to devres_release_all() and
arch_teardown_dma_ops().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: stable <stable@vger.kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
[rm: backport for 4.12-4.19 - kernels before 5.0 will not see
the crash above, but may get silent memory corruption instead]
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 6f166975a72c85094ca5364f85efd46b36f0f86a)
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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|
Currently, utlbs_val and asids_val are located and leaked
when the later master device has same IPMMU cache
Since one IPMMU cache can have multiple masters, utlbs_val and
asids_val should be managed per master device instead
Fix it by:
- Putting utlbs_val and asids_val to backup struct, where we
will backup data for the master device
- Adding proper error handling
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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PCI devices
The IOMMU can't distinguish between different PCI Functions.
Use PCI Host controller as a proxy for all connected PCI devices.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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|
Whitelist check is specific for Renesas R-Car Gen3 SoCs only.
Bypass the check for other SoCs.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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|
Remove unnecessary macro guards to support suspend/resume by default
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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* rcar-3.9.2/ehci_ohci.rc1:
USB: ohci-hcd.c: Add spinlock when disabling OHCI interrupts in ohci_shutdown
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|
This patch is used for fixing 'irq nobody care' issue during reboot
How to reproduce:
1)Prepare weston enabled environment
2)Connect USB mouse
3)Read input from the mouse and reboot
$ od -tx /dev/input/event0 &
$ reboot
4)Move the mouse while system shutdown
Don't need to move the mouse after "reboot: Restarting system"
5)Repeat step 3 and step 4 until below error occurs
Error log:
usb 2-1: USB disconnect, device number 2
irq 156: nobody cared (try booting with the "irqpoll" option)
Workqueue: usb_hub_wq hub_event
Call trace:
...
usbhid_disconnect+0x4c/0x78
usb_unbind_interface+0x6c/0x2a8
device_release_driver_internal+0x174/0x208
device_release_driver+0x14/0x20
bus_remove_device+0x114/0x128
device_del+0x1ac/0x300
usb_disable_device+0x8c/0x200
usb_disconnect+0xb4/0x218
...
handlers:
usb_hcd_irq
Disabling IRQ #156
This issue occurs due to race condition between ohci_irq()
interrupt handler and ohci_shutdown()
Adding spin_lock_irq() to prevent interrupt raising while ohci is shutting
down can fix this issue.
When host controller dies, lock will be held by io_watchdog_func before
ohci_shutdown, so locking should be skipped in this case to prevent
deadlock
Signed-off-by: Tho Vu <tho.vu.wh@rvc.renesas.com>
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|
* rcar-3.9.2/adv748x.rc1:
media: i2c: adv748x: Use devm to allocate the device struct
media: i2c: adv7482: Fix wait procedure usleep_range from msleep
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Switch to devm_kzalloc() when allocating the adv748x device struct.
The sizeof() is updated to determine the correct allocation size from
the dereferenced pointer type rather than hardcoding the struct type.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
[Kieran: Change sizeof() to dereference the pointer type]
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://patchwork.kernel.org/patch/10760277/
[koji.matsuoka.xm: the part of the patch for kernel v4.14.75
was rebased and imported]
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
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By Documentation/timers/timers-howto.txt, when waiting 20ms from 10us,
it is correct to use usleep_range. this patch corrects it.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
(cherry picked from horms/renesas-bsp commit af0cdba377bc
("media: i2c: adv7482: Fix wait procedure usleep_range from msleep"))
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Link: https://patchwork.kernel.org/patch/10758319/
[koji.matsuoka.xm: the part of the patch for kernel v4.14.75
was rebased and imported]
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
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* rcar-3.9.2/rcar-csi2.rc1:
rcar-vin: rcar-csi2: Fix comment of VCDT/VCDT2 register
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|
According to latest H/W manual v1.50, the description of channel
number in the VCDT/VCDT2 register is decremented by one.
Therefore, this patch fixes it about comment.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
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* rcar-3.9.2/rcar-vin.rc2:
media: rcar-vin: Allow independent VIN link enablement
|
|
There is a block of code in rvin_group_link_notify() that prevents
enabling a link to a VIN node if any entity in the media graph is
in use. This prevents enabling a VIN link even if there is an in-use
entity somewhere in the graph that is independent of the link's
pipeline.
For example, the code block will prevent enabling a link from
the first rcar-csi2 receiver to a VIN node even if there is an
enabled link somewhere far upstream on the second independent
rcar-csi2 receiver pipeline.
If this code block is meant to prevent modifying a link if any entity
in the graph is actively involved in streaming (because modifying
the CHSEL register fields can disrupt any/all running streams), then
the entities stream counts should be checked rather than the use counts.
(There is already such a check in __media_entity_setup_link() that verifies
the stream_count of the link's source and sink entities are both zero,
but that is insufficient, since there should be no running streams in
the entire graph).
Modify the code block to check the entity stream_count instead of the
use_count (and elaborate on the comment). VIN node links can now be
enabled even if there are other independent in-use entities that are
not streaming.
Fixes: c0cc5aef31 ("media: rcar-vin: add link notify for Gen3")
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://patchwork.kernel.org/patch/10763675/
[koji.matsuoka.xm: the part of the patch for kernel v4.14.75
was rebased and imported]
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
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* rcar-3.9.2/vsp-du.rc1:
drm: rcar-du: Fix loop procedure in scatter gather page set
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|
Originally the variable of "i" is used for the loop count of
the number of format planes in rcar_du_vsp_plane_prepare_fb
function and should be not used the same "i" as the loop count
of sg_set_page.
It is affected when the number of format planes is 2 (NV12 format
etc.) and 3 (YUV420 format etc.).
For the number of format planes is 1 (RGB565, ARGB888, YUYV etc),
this function works fine.
This patch solves its problem.
Fixes: c424cd4724 ("drm: rcar-du: Allow importing non-contiguous
dma-buf with VSP")
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
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* rcar-3.9.2/audio.rc2:
ASoC: rsnd: fixup MIX kctrl registration
ASoC: rsnd: tidyup registering method for rsnd_kctrl_new()
ASoC: rsnd: fixup rsnd_ssi_master_clk_start() user count check
ASoC: rsnd: update BSDSR/BSDISR handling
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Renesas sound device has many IPs and many situations.
If platform/board uses MIXer, situation will be more complex.
To avoid duplicate DVC kctrl registration when MIXer was used,
it had original flags.
But it was issue when sound card was re-binded, because
no one can't cleanup this flags then.
To solve this issue, commit 9c698e8481a15237a ("ASoC: rsnd: tidyup
registering method for rsnd_kctrl_new()") checks registered
card->controls, because if card was re-binded, these were cleanuped
automatically. This patch could solve re-binding issue.
But, it start to avoid MIX kctrl.
To solve these issues, we need below.
To avoid card re-binding issue: check registered card->controls
To avoid duplicate DVC registration: check registered rsnd_kctrl_cfg
To allow multiple MIX registration: check registered rsnd_kctrl_cfg
This patch do it.
Fixes: 9c698e8481a15237a ("ASoC: rsnd: tidyup registering method for rsnd_kctrl_new()")
Reported-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 7aea8a9d71d54f449f49e20324df06341cc18395)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Current rsnd dvc.c is using flags to avoid duplicating register for
MIXer case. OTOH, commit e894efef9ac7 ("ASoC: core: add support to card
rebind") allows to rebind sound card without rebinding all drivers.
Because of above patch and dvc.c flags, it can't re-register kctrl if
only sound card was rebinded, because dvc is keeping old flags.
(Of course it will be no problem if rsnd driver also be rebinded,
but it is not purpose of above patch).
This patch checks current card registered kctrl when registering.
In MIXer case, it can avoid duplicate register if card already has same
kctrl. In rebind case, it can re-register kctrl because card registered
kctl had been removed when unbinding.
This patch is updated version of commit b918f1bc7f1ce ("ASoC: rsnd: DVC
kctrl sets once")
Reported-by: Nguyen Viet Dung <dung.nguyen.aj@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <dung.nguyen.aj@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 9c698e8481a15237a5b1db5f8391dd66d59e42a4)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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commit 4d230d1271064 ("ASoC: rsnd: fixup not to call clk_get/set
under non-atomic") added new rsnd_ssi_prepare() and moved
rsnd_ssi_master_clk_start() to .prepare.
But, ssi user count (= ssi->usrcnt) is incremented at .init
(= rsnd_ssi_init()).
Because of these timing exchange, ssi->usrcnt check at
rsnd_ssi_master_clk_start() should be adjusted.
Otherwise, 2nd master clock setup will be no check.
This patch fixup this issue.
Fixes: commit 4d230d1271064 ("ASoC: rsnd: fixup not to call clk_get/set under non-atomic")
Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Reported-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit d9111d36024de07784f2e1ba2ccf70b16035f378)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Current BSDSR/BSDISR are using temporary/generic settings, but it can't
handle all SRCx/SoC. It needs to handle correctry.
Otherwise, sampling rate converted sound channel will be broken if it
was TDM. One note is that it needs to overwrite settings on E3 case.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: chaoliang qin <chaoliang.qin.jg@renesas.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 7674bec4fc09e85803a8f2bd26a013d0076a80a9)
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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* rcar-3.9.2/i2c-rcar.rc1:
i2c: Make i2c_unregister_device() NULL-aware
i2c: dev: mark RDWR buffers as DMA_SAFE
i2c compat ioctls: move to ->compat_ioctl()
Revert "i2c: dev: mark RDWR buffers as DMA_SAFE"
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It's a common pattern to be NULL-aware when freeing resources.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit 7b43dd19c9b13a3f5478b9d88a49a5495399ad29)
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Conflicts:
drivers/i2c/i2c-core-base.c
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|
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit 978336d48d887d6deb7793e0d20a4673f357fb8e)
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
(cherry picked from commit 7d5cb45655f2e9e37ef75d18f50c0072ef14a38b)
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
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This reverts commit 7e15a55865897a5ea4c1bbb5f6338b0b75c9d898.
The reason is to maintain compatibility with the v4.14.35 kernel.
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
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* rcar-3.9.2/sd_mmc.rc3:
mmc: renesas_sdhi: max_segs_on_iommu applies only no-sdio port
mmc: tmio: No memory size limitation if runs on IOMMU
mmc: renesas_sdhi: add max_segs_on_iommu to use large max_segs
mmc: renesas_sdhi: Fix hang up in HS400 timing mode selection
mmc: tmio: fix access width of Block Count Register
mmc: renesas_sdhi_internal_dmac: Fix DMA buffer alignment from 8 to 128-bytes
mmc: renesas_sdhi: Change HS400 manual calibration value for r8a77990
mmc: renesas_sdhi_internal_dmac: mask DMAC interrupts
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In Gen3 IOMMU, SG entries page size expects a multiple of PAGE_SIZE.
However, SG entries are allocated in small segment in SDIO.
max_segs_on_iommu applies only "no-sdio" port in DeviceTree.
In Atheros SDIO WiFi, the SDIO firmware crashes during the execution
of iperf3 command.
iperf3 -c <IP address>
[ 53.457669] ath6kl: firmware crashed
[ 53.473327] ath6kl: crash dump:
:
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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This patch adds a condition to avoid memory size limitaion of
swiotlb if the driver runs on IOMMU.
Tested-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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This patch adds a new parameter max_segs_on_iommu into
renesas_sdhi_of_data to use large max_segs value If IOMMU is
enabled. In case of the SDHI internal DMAC with IOMMU is enabled,
since it can use multiple segments, such environment may improve
performance, especially small sg buffers are used.
Tested-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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In HS400 timing mode selection, SD clock is switched the
following.
1) HS200 (200MHz) for tuning
2) High Speed (<= 52MHz) for select HS400 mode (card)
3) HS400 (200MHz)
In R-Car Gen3 SDHI, internal SCC modules uses SDnH clock.
It is controlled by SDnCKCR.STPnHCK bit in CPG.
When SD clock is less than High Speed, SDnH clock is stopped.
And SDnH clock is supplied with 100MHz or more in Clock divider
table of CPG in R-Car Gen3.
It is the recommended setting of H/W.
Therefore, when bus timing is SDR104/HS200/HS400 mode, minimum
frequency of SDHI clock is 100MHz.
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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In R-Car Gen2 or later, the maximum number of transfer blocks are
changed from 0xFFFF to 0xFFFFFFFF. Therefore, Block Count Register
should use iowrite32().
If another system (U-boot, Hypervisor OS, etc) uses bit[31:16], this
value will not be cleared. So, SD/MMC card initialization fails.
So, check for the bigger register and use appropriate write. Also, mark
the register as extended on Gen2.
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: use max_blk_count in if(), add Gen2, update commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: stable@kernel.org
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Patchwork: https://patchwork.kernel.org/patch/10824707/
[saito: fixed typo in comment]
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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The internal DMAC buffer alignment condition of R-Car Gen3 SDHI
HW is 128 bytes before. It is correct, but HW manual have had a
mistake as 8 bytes. The driver is fixed with 128 bytes according
to the modification of HW manual, this time.
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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According to latest SDHI HW manual, HS400 manual calibration value
for r8a77990 is changed.
offset= 0 (not change)
calibration code= auto calibration value -4
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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I have encountered an interrupt storm during the eMMC chip probing (and
the chip finally didn't get detected). It turned out that U-Boot left
the SDHI DMA interrupts enabled while the Linux driver didn't use those.
Masking those interrupts in renesas_sdhi_internal_dmac_request_dma() gets
rid of both issues...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Fixes: 2a68ea7896e3 ("mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC")
Cc: stable@vger.kernel.org # v4.14+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit d2332f887ddfba50fee93b8e1736376517c2df0c)
[saito: adjust context.]
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
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* rcar-3.9.2/dmae.rc1:
dmaengine: sh: rcar-dmac: Fix glitch in dmaengine_tx_status
dmaengine: sh: rcar-dmac: With cyclic DMA residue 0 is valid
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The tx_status poll in the rcar_dmac driver reads the status register
which indicates which chunk is busy (DMACHCRB). Afterwards the point
inside the chunk is read from DMATCRB. It is possible that the chunk
has changed between the two reads. The result is a non-monotonous
increase of the residue. Fix this by introducing a 'safe read' logic.
Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
Signed-off-by: Achim Dahlhoff <Achim.Dahlhoff@de.bosch.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Cc: <stable@vger.kernel.org> # v4.16+
Link: https://patchwork.kernel.org/patch/10839057/
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Having a cyclic DMA, a residue 0 is not an indication of a completed
DMA. In case of cyclic DMA make sure that dma_set_residue() is called
and with this a residue of 0 is forwarded correctly to the caller.
Fixes: 3544d2878817 ("dmaengine: rcar-dmac: use result of updated get_residue in tx_status")
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Achim Dahlhoff <Achim.Dahlhoff@de.bosch.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: <stable@vger.kernel.org> # v4.8+
Link: https://patchwork.kernel.org/patch/10839055/
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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* rcar-3.9.2/ravb.rc1:
ravb: Protect access to ts_skb_list with spinlock.
ravb: Fix use-after-free ravb_tstamp_skb
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This patch fixes issue PTP Bridge application does not receive tx
timestamp information anymore and stops working when transferring
with large data
How to reproduce:
1) Write an application wich uses these socket options:
SOF_TIMESTAMPING_TX_HARDWARE | SOF_TIMESTAMPING_RAW_HARDWARE
2) Set affinity of application and (all) interrupts to a different
core
3) Transmit a large number of ethernet frames from that socket
The iterator over ts_skb_list was unprotected with regard to list
insertion from the xmit function
Signed-off-by: Tho Vu <tho.vu.wh@rvc.renesas.com>
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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This patch is used for fixing kernel crash caused by ethernet driver
Crash:
Unable to handle kernel paging request at virtual address 7000000000000
[0007000000000000] address between user and kernel address ranges
Internal error: Oops: 96000004 [#1] PREEMPT SMP
CPU: 0 PID: 2500 Comm: m3.reader Tainted: P O 4.14.35-yocto-standard #1
task: ffffffc648f0f080 task.stack: ffffff80229d8000
PC is at kfree_skb_list+0x14/0x30
LR is at skb_release_data+0x44/0x12c
Call trace:
Exception stack
...
kfree_skb_list+0x14/0x30
skb_release_data+0x44/0x12c
skb_release_all+0x24/0x30
__kfree_skb+0x14/0x28
consume_skb+0xe4/0xf0
__dev_kfree_skb_any+0x38/0x3c
switch_ptp_endpoint_tx+0x1fc/0x1560 [ptp_broker]
sock_queue_err_skb+0xf0/0x12c
__skb_complete_tx_timestamp+0x98/0xb8
__skb_tstamp_tx+0xb8/0x18c
skb_tstamp_tx+0x14/0x1c
ravb_poll+0x67c/0x6dc [ravb]
net_rx_action+0x12c/0x33c
__do_softirq+0x298/0x348
irq_exit+0x74/0xbc
__handle_domain_irq+0x78/0xac
gic_handle_irq+0x80/0xac
Exception stack
el0_irq_naked+0x44/0x4c
Kernel panic - not syncing: Fatal exception in interrupt
Kernel Offset: disabled
CPU features: 0x0802004
---[ end Kernel panic - not syncing: Fatal exception in interrupt
When a Tx timestamp is requested, a pointer to the skb is stored in the
ravb_tstamp_skb struct. This was done without an skb_get. There exists
the possibility that the skb could be freed by ravb_tx_free (when
ravb_tx_free is called from ravb_start_xmit) before the timestamp was
processed, leading to a use-after-free bug.
Use skb_get when filling a ravb_tstamp_skb struct, and add appropriate
frees/consumes when a ravb_tstamp_skb struct is freed.
Signed-off-by: Tho Vu <tho.vu.wh@rvc.renesas.com>
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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* rcar-3.9.2/ems.rc1:
thermal: renesas: Add some property descriptions for emergency shutdown node
thermal: renesas: Add emergency shutdown support in DT documentation
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This patch adds description for "status", "target_cpus" property
of emergency shutdown node and correct some typos.
Also, it modifies DT example for interrupt mode due to updated
IRQ implementation.
Signed-off-by: Hien Dang <hien.dang.eb@rvc.renesas.com>
(cherry picked from horms/renesas-bsp commit 957b800af000df9cf99ffeca7e03dd62ed453032)
[jiada: Resolve conflict in Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt]
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
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Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
(cherry picked from horms/renesas-bsp commit 831876202b1672e6eedf9efa9d2d95c5947b9cc9)
[jiada: Resolve conflict in Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt]
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
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* rcar-3.9.2/optee-rcar.rc2:
tee: optee: Modify duration of spinlock for list
tee: optee: Change wait to interruptible
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R-Car OP-TEE driver acquires spinlock only for the duration of list_del()
when deleting entries from the debug log list.
This may cause that a debug log is left in list until a next RPC is
received.
And list_for_each_entry_safe() is not safe for deleting entries from the
list if the spin lock is released and reacquired during the list iteration.
Therefore, this patch replaces list_for_each_entry_safe() with checking
if list is empty and removing the first entry in each iteration, and
lock for the duration of the sequence.
Signed-off-by: Hiroki Negishi <hiroki.negishi.bx@renesas.com>
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The thread of R-Car OP-TEE driver waits for RPC debug log command
from OP-TEE, with wait_event (i.e. in TASK_UNINTERRUPTIBLE state).
In case OP-TEE does't output the debug log for a long time,
a hung task warning occurs when CONFIG_DETECT_HUNG_TASK is set:
INFO: task optee_debug_log:1855 blocked for more than 120 seconds.
Tainted: G O 4.14.75-ltsi-yocto-standard #3
"echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
optee_debug_log D 0 1855 2 0x00000020
Call trace:
[<ffff000008085cf4>] __switch_to+0x94/0xd8
[<ffff000008b247c4>] __schedule+0x1c4/0x710
[<ffff000008b24d48>] schedule+0x38/0xa0
[<ffff0000089cfcfc>] debug_log_kthread+0xc4/0x130
[<ffff0000080eef2c>] kthread+0x12c/0x130
[<ffff000008084ed8>] ret_from_fork+0x10/0x18
This patch changes to wait in TASK_INTERRUPTIBLE state
to solve a hung task warning.
Signed-off-by: Hiroki Negishi <hiroki.negishi.bx@renesas.com>
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* rcar-3.9.2/clk-rcar-gen3.rc4:
clk: renesas: r8a77{95,96,965,990}: Rename DRIF clock names
clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate return value
clk: renesas: r8a7796: Remove iVDP1C and FCPCI0 clocks on ES3.0
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According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the DRIF clock names has been renamed as follows:
DRIF0 to DRIF00
DRIF1 to DRIF01
DRIF2 to DRIF10
DRIF3 to DRIF11
DRIF4 to DRIF20
DRIF5 to DRIF21
DRIF6 to DRIF30
DRIF7 to DRIF31
Therefore, this patch renames the DRIF clock names from DRIFn to DRIFmm.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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cpg_sd_clock_round_rate() may return an unsupported clock rate for the
requested clock rate. Therefore, when cpg_sd_clock_set_rate() sets the
clock rate acquired by cpg_sd_clock_round_rate(), an error may occur.
This is not conform the clk API design.
This patch fixes that by making sure cpg_sd_clock_calc_div() considers
only the division values defined in cpg_sd_div_table[].
With this fix, the cpg_sd_clock_round_rate() always return a support
clock rate.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Module Standby and Software Reset specifications differ between R-Car M3
ES1.x to ES3.0 or later:
- From ES3.0, the FCPCI0 module clock bit of the MSTPSR6/RMSTPCR6/
SMSTPCR6/SRCR6 register was removed.
- From ES3.0, the iVDP1C module clock bit of the MSTPSR1/RMSTPCR1/
SMSTPCR1/SRCR1 register was merged from bit28 to bit30 which
the VCP4(VCPLF) module clock bit.
This patch removes the FCPCI0 and iVDP1C module clocks. To control
the iVDP1C module clock, the VCP4(VCPLF) module clock bit is used.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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* rcar-3.9.2/sh-pfc.rc3:
pinctrl: sh-pfc: r8a77990: Rename AVB_AVTP_MATCH and AVB_AVTP_CAPTURE pin function definitions
Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D"
Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2"
pinctrl: sh-pfc: r8a77990: Rename RTS{0,1,3,4}# pin function definitions
pinctrl: sh-pfc: r8a77965: Fix SEL_NDF name
pinctrl: sh-pfc: r8a7796: Rename SEL_NDFC to SEL_NDF
pinctrl: sh-pfc: r8a77{95,96,965}: Rename SEL_ADG_B to SEL_ADGB and rename SEL_ADG_C to SEL_ADGC
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function definitions
In R-Car Gen3 Hardware Manual Rev 1.50, IPSR2 register bit[23:20] value
H'3 was defined as AVB_AVTP_MATCH_A pin, and IPSR2 register bit[27:24]
value H'3 was defined as AVB_AVTP_CAPTURE_A pin. However, these pin
definition names are correctly AVB_AVTP_MATCH and AVB_AVTP_CAPTURE.
NOTE: This information will be reflected in the R-Car Gen3 Hardware
Manual in the future.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This reverts commit 1f7ab968019378a4ebbd65dd127c9c114252f088.
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
Aug 24, 2018, the SEL_SIMCARD_{0,1} definition was to be deleted.
However, this fixes the double definition in R-Car Gen3 Hardware User's
Manual Rev.1.00. The definition is not deleted in R-Car Gen3 Hardware
User's Manual Rev.1.50.
So revert the commit and recover the definition.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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and SSI_WS2"
This reverts commit 05288fc1f355d95ea6c06190af1337730591ae90.
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
Aug 24, 2018, the SEL_SSI2_{0,1} definition was to be deleted.
However, this fixes the double definition in R-Car Gen3 Hardware User's
Manual Rev.1.00. The definition is not deleted in R-Car Gen3 Hardware
User's Manual Rev.1.50.
So revert the commit and recover the definition.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the RTS{0,1,3,4}_#/TANS pin names defined in the GPSR and
IPSR registers are renamed to RTS{0,1,3,4}_# on R-Car E3.
This patch fixes this.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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In R-Car M3-N, the MOD_SEL0 bit22 name is sel_ndf, but the current code
is sel_ndfc. This patch fixes this typo.
Fixes: 4aac8c11e578183c ("pinctrl: sh-pfc: Initial R-Car M3-N support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the MOD_SEL2 register bit22 name is renamed from sel_ndfc
to sel_ndf on R-Car M3-W.
Therefore, the definition names are renamed from SEL_NDFC_{0,1} to
SEL_NDF_{0,1}.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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SEL_ADG_C to SEL_ADGC
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Dec 25, 2018, the MOD_SEL0 register bit18 name is renamed from sel_adg_b
to sel_adgb, and bit17 name is renamed from sel_adg_c to sel_adgc on R-Car
H3, R-Car M3-W and R-Car M3-N.
Therefore, the definition names are renamed from SEL_ADG_B_{0,1} to
SEL_ADGB_{0,1}, and SEL_ADG_C_{0,1} to SEL_ADGC_{0,1}.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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* rcar-3.9.2/RuntimePM.rc1:
soc: renesas: r8a7796-sysc: Nullify A2VC0 on M3 Ver.3.0
soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain
soc: renesas: rcar-sysc: Remove power domains always on for M3N v1.0
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1/ As update of hardware specification,
A2VC0 power domain is not supported on M3 Ver.3.0.
This patch updates for this purpose.
2/ For clean source code, we adjust the implementation
for applying SYSCEXTMASK for only M3 Ver.3.0.
It still keeps purpose of patch
(ee953e6 soc: renesas: rcar-sysc: Add SYSCEXTMASK info for r8a7796)
In addition, copyright is updated.
Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
Signed-off-by: Nam Dang <nam.dang.uw@rvc.renesas.com>
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The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).
The definition in the DT bindings header cannot be removed yet, until
its (incorrect) user has been removed.
Fixes: a527709b78b3c997 ("soc: renesas: rcar-sysc: Add R-Car M3-N support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a93913cecb3c98c2310da42a9650cfd817fb00b8)
Signed-off-by: Nam Dang <nam.dang.uw@rvc.renesas.com>
Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
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In the past, we have enabled power domains always on
for M3N v1.0 due to hardware restriction.
But after confirming from hardware team
it is not needed. So, this patch removes it.
Signed-off-by: Nam Dang <nam.dang.uw@rvc.renesas.com>
Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
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This patch corrects whitelist devices assignment, in particular:
- Remove unavailable USB-DMAC ch2/3 devices on r8a7796 (R-Car M3) whitelist
- Add missing USB2.0 Host ch1 device on r8a77965 (R-Car M3N) whitelist
- Fix typo for Audio DMAC ch26 device
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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MOD_SEL register bit numbering was different from R-Car D3/E3 SoC and
R-Car H3/M3/M3N SoC.
MOD_SEL 1-bit H3/M3/M3N D3/E3
=============== ========== =====
Set Value = H'0 b'0 b'0
Set Value = H'1 b'1 b'1
MOD_SEL 2-bits H3/M3/M3N D3/E3
=============== ========== =====
Set Value = H'0 b'00 b'00
Set Value = H'1 b'01 b'10
Set Value = H'2 b'10 b'01
Set Value = H'3 b'11 b'11
MOD_SEL 3-bits H3/M3/M3N D3/E3
=============== ========== =====
Set Value = H'0 b'000 b'000
Set Value = H'1 b'001 b'100
Set Value = H'2 b'010 b'010
Set Value = H'3 b'011 b'110
Set Value = H'4 b'100 b'001
Set Value = H'5 b'101 b'101
Set Value = H'6 b'110 b'011
Set Value = H'7 b'111 b'111
This patch replaces the #define name and value of MOD_SEL.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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* v4.14.75-ltsi/dts-rcar-gen3.rc8: (310 commits)
arm64: dts: r8a77990: Support IPMMU(MMU mode) for IPMMU-VP0 and IPMMU-VC0
arm64: dts: r8a77965: Support IPMMU(MMU mode) for IPMMU-VP0 and IPMMU-VC0
arm64: dts: r8a7796: Support IPMMU(MMU mode) for IPMMU-VC0
arm64: dts: r8a7795: Support IPMMU(MMU mode) for IPMMU-VP0/1 and IPMMU VC0/1
arm64: dts: r8a77990: Change IPMMU-MM and IPMMU-caches order in DT
arm64: dts: r8a77965: Change IPMMU-MM and IPMMU-caches order in DT
arm64: dts: r8a7796: Change IPMMU-MM and IPMMU-caches order in DT
arm64: dts: r8a7795: Change IPMMU-MM and IPMMU-caches order in DT
arm64: dts: r8a77990: Tie Audio-DMAC to IPMMU-MP
arm64: dts: r8a77965: Tie Audio-DMAC to IPMMU-MP
arm64: dts: r8a7795-es1: Add power domains property for IPMMU device nodes
arm64: dts: renesas: r8a77990: Change default of all IPMMU devices to disable
arm64: dts: renesas: r8a77965: Change default of all IPMMU devices to disable
arm64: dts: r8a77990: Detach IPMMU-VI0/1 from FCPVD
Revert "arm64: dts: renesas: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI0/1"
Revert "arm64: dts: renesas: r8a7795-es1: Point DU/VSPD via FCPVD to IPMMU-VI0"
Revert "arm64: dts: renesas: r8a7795: Connect Ethernet-AVB to IPMMU-DS0"
Revert "arm64: dts: renesas: r8a7795: Connect SATA to IPMMU-HC"
Revert "arm64: dts: renesas: r8a7795: Enable IPMMU-VI0, VP1, DS0, DS1 and MM"
Revert "arm64: dts: renesas: r8a7795: Enable IPMMU devices"
Revert "arm64: dts: renesas: r8a7795-es1: Enable IPMMU-MP1"
Revert "arm64: dts: renesas: r8a7795-es1: Enable IPMMU devices"
Revert "arm64: dts: renesas: r8a7796: Point FDP1 via FCPF to IPMMU-VI0"
Revert "arm64: dts: renesas: r8a7796: Connect Ethernet-AVB to IPMMU-DS0"
Revert "arm64: dts: renesas: r8a7796: Enable IPMMU-DS0, DS1, MP, VI0, VC0 and MM"
Revert "arm64: dts: renesas: r8a7796: Enable IPMMU devices"
arm64: dts: ulcb: Change to use "audio-graph-card"
arm64: dts: r8a7795-h3ulcb-4x2g: Overwrite dma-ranges of pcie nodes for R-Car H3 ES2.0/3.0
arm64: dts: r8a7795-h3ulcb-4x2g.dts: Add H3ULCB (4 x 2 GiB) support
arm64: dts: r8a7795-h3ulcb: Fix source clock for DU2
...
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This patch enables MMNGR support for IPMMU(MMU mode) in IPMMU-VP0 and
IPMMU-VC0.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables MMNGR support for IPMMU(MMU mode) in IPMMU-VP0 and
IPMMU-VC0.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables MMNGR support for IPMMU(MMU mode) in IPMMU-VC0.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables MMNGR support for IPMMU(MMU mode) in IPMMU-VP0/1 and
IPMMU VC0/1.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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In current implementation, IPMMU-caches will defer probe for waiting
IPMMU-MM by returning -EPROBE_DEFER. However, it leads to other driver,
e.g. DMAC, which rely on IPMMU-caches to setup its configuration,
defer probe as well.
As a workaround for this issue, reorder IPMMU-MM and IPMMU-caches in DT
in order to make IPMMU-MM probe first since current driver only parses DT
info when setting up IPMMU domain.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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In current implementation, IPMMU-caches will defer probe for waiting
IPMMU-MM by returning -EPROBE_DEFER. However, it leads to other driver,
e.g. DMAC, which rely on IPMMU-caches to setup its configuration,
defer probe as well.
As a workaround for this issue, reorder IPMMU-MM and IPMMU-caches in DT
in order to make IPMMU-MM probe first since current driver only parses DT
info when setting up IPMMU domain.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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In current implementation, IPMMU-caches will defer probe for waiting
IPMMU-MM by returning -EPROBE_DEFER. However, it leads to other driver,
e.g. DMAC, which rely on IPMMU-caches to setup its configuration,
defer probe as well.
As a workaround for this issue, reorder IPMMU-MM and IPMMU-caches in DT
in order to make IPMMU-MM probe first since current driver only parses DT
info when setting up IPMMU domain.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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In current implementation, IPMMU-caches will defer probe for waiting
IPMMU-MM by returning -EPROBE_DEFER. However, it leads to other driver,
e.g. DMAC, which rely on IPMMU-caches to setup its configuration,
defer probe as well.
As a workaround for this issue, reorder IPMMU-MM and IPMMU-caches in DT
in order to make IPMMU-MM probe first since current driver only parses DT
info when setting up IPMMU domain.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Hook up r8a77990 Audio-DMAC nodes to the IPMMU-MP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Hook up r8a7796 Audio-DMAC nodes to the IPMMU-MP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds power domains property for r8a7795 ES1.x IPMMU nodes
and maintains the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This patch disables all IPMMU device defaults and maintains the same
IPMMU support environment with previous released R-Car Linux BSP.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch disables all IPMMU device defaults and maintains the same
IPMMU support environment with previous released R-Car Linux BSP.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch changes the IPMMU address translation for FCPVD to disabled
by default. This maintains the same IPMMU support environment
as the previously released R-Car Linux BSP.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This reverts commit 1677d8258cff1be47bee25778f4ad11bfb46396d
to keep IPMMU address translation for FCPVD is disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 6507eaf83cf2562da47e001dae34942df93fb941
to keep IPMMU address translation for FCDVD is disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 8cd8833fa32dddfbad56967fd858579282cbb131
to keep IPMMU address translation for Ethernet-AVB is disabled
by default, maintain the same IPMMU support environment with
previous released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit bceb2536860ac574dc7994a5d890dd8a2bccd149
to keep IPMMU address translation for SATA is disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 89abb9418c1c7b454bc0129b4dc0b2c7d81f854f
to keep all IPMMU devices are disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 45ae9c6b1e8b7790b5ed030c94a821393b3a97fe
to keep all IPMMU devices are disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 26c5f2a4f3c4a17f2a08112de7bf35b9a73b652b
to keep all IPMMU devices are disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 4de1d0ffe6ee61de3f62302fc31b474316a2b832
to keep all IPMMU devices are disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 128d63794adbdaf73a6c8ad541614e84c2775244
to keep IPMMU address translation for FDP1 is disabled by default,
maintain the same IPMMU support environment with previous released
R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit 00f9a5180a3ddc31ce4c0655a730bf14d4e35262
to keep IPMMU address translation for Ethernet-AVB is disabled
by default, maintain the same IPMMU support environment with
previous released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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and MM"
This reverts commit 2bcd1268a1ed8992731ac860c2ec26a8dce88f6c
to keep all IPMMU devices are disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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This reverts commit c8b4002ce990599c9bbcd95e9a9617689bd1070f
to keep all IPMMU devices are disabled by default,
maintain the same IPMMU support environment with previous
released R-Car Linux BSP.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
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The default setting of Salvator board is "audio-graph-card".
So, this patch changes from "simple-audio-card" to "audio-graph-card".
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
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R-Car H3 ES2.0/3.0
This patch overwrites dma-ranges property of pcie nodes
due to memory map change in R-Car H3 ES2.0/3.0 (2 x 2 GiB)
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
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This patch adds initial support for H3ULCB board equipped with an
R-Car H3 SiP of 8GiB (4 x 2 GiB) memory model.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
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This patch changes the clock for DU2, supply the initial value of
versaclock directly to the DU2.
The initial value of versaclock out4 is 33 MHz.
Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
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Add H3ULCB Device tree bindings Documentation, listing it as a supported
board.
Board type name | DDR | eMMC
------------------------------------------------------
RTP0RC77951SKBX010SA00 | 4GiB(4 x 1 GiB) | 8GB
RTP0RC77951SKBX010SA03 | 8GiB(4 x 2 GiB) | 32GB
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
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This patch changes the clock for DU, supply the initial value of
versaclock directly to the DU.
The initial value of versaclock out3 is 33 MHz.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch changes the clock for DU, supply the initial value of
versaclock directly to the DU.
The initial value of versaclock out3 is 33 MHz.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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The revision of M3ULCB board on the R8A7796 SoC is ES1.0. This revision
can not use CPUIdle for CA53 cores.
Therefore, this patch disables CPUIdle support for CA53.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds Media Clock Recovery Handler device node for
the ulcb board
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[takeshi.kihara.df: add cpg reset property]
[takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Add VSP Manager I/F driver node for M3ULCB board on R8A7796 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGRBUF external kernel module for M3ULCB board
on R8A7796 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGR external kernel module for M3ULCB board on
R8A7796 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds reserved memory regions:
- Lossy Decompression
48 MiB : 0x0054000000 -> 0x0056ffffff
- Default CMA area
400 MiB : 0x0057000000 -> 0x006fffffff
- CMA area for MMP
256 MiB : 0x0070000000 -> 0x007fffffff
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Add VSP Manager I/F driver node for H3ULCB board on R8A7795 ES1.x SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGRBUF external kernel module for H3ULCB board
on R8A7795 ES1.x SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGR driver for H3ULCB board on R8A7795 ES1.x SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds reserved memory regions:
- Lossy Decompression
48 MiB : 0x0054000000 -> 0x0056ffffff
- Default CMA area
400 MiB : 0x0057000000 -> 0x006fffffff
- CMA area for MMP
256 MiB : 0x0070000000 -> 0x007fffffff
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
[takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Add VSP Manager I/F driver node for H3ULCB board on R8A7795 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGRBUF external kernel module for H3ULCB board
on R8A7795 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds MMNGR driver for H3ULCB board on R8A7795 SoC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
|
This patch adds reserved memory regions:
- Lossy Decompression
48 MiB : 0x0054000000 -> 0x0056ffffff
- Default CMA area
400 MiB : 0x0057000000 -> 0x006fffffff
- CMA area for MMP
256 MiB : 0x0070000000 -> 0x007fffffff
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
[takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This adds cpu-supply property in a57_0 node
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds the mmc-hs400-1_8v delete-property to SDHI2 and
disable eMMC HS400.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds the mmc-hs400-1_8v property to SDHI2 and enables eMMC
HS400.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Ebisu board on the R8A77990
ES1.0 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Ebisu board on the R8A77990
SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X 2nd version board
on the R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X 2nd version board
on the R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X 2nd version board
on the R8A7795 ES2.0 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X board
on the R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X board
on the R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X board
on the R8A7795 ES1.x SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch enables Audio DSP (ADSP) for the Salvator-X board
on the R8A7795 ES2.0 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds ADSP device node for R8A77990 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
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This patch adds ADSP device node for R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
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This patch adds ADSP device node for R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
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This patch adds ADSP device node for R8A7795 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
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This patch adds Media Clock Recovery Handler device node for
the Ebisu board on the R8A77990 ES1.0 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds Media Clock Recovery Handler device node for
the Ebisu board on the R8A77990 SoC.
[takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
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This patch adds Media Clock Recovery Handler device node for
the Salvator boards.
[takeshi.kihara.df: add cpg reset property]
[takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds QoS device node for the R8A77990 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
|
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This patch adds QoS device node for the R8A77995 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds QoS device node for the R8A77965 SoC.
[takeshi.kihara.df: fix for warning when compiling with W=1:
Node /soc/qos@e67e0000 has a unit name, but no reg property]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds QoS device node for the R8A7796 SoC.
[takeshi.kihara.df: fix for warning when compiling with W=1:
Node /soc/qos@e67e0000 has a unit name, but no reg property]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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This patch adds QoS device node for the R8A7795 SoC.
[takeshi.kihara.df: fix for warning when compiling with W=1:
Node /soc/qos@e67e0000 has a unit name, but no reg property]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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