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| author | Hoan Nguyen An <na-hoan@jinso.co.jp> | 2019-03-27 18:03:18 +0900 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2019-07-11 21:17:14 +0900 |
| commit | 39eee119052a1bb826bab60dcc5531ec34e3b4cf (patch) | |
| tree | 9aabfa6e801d8412625ec2c2fe43d8d6641e9d77 | |
| parent | 1a76e02667ece64de603e392713215acc1c47ed4 (diff) | |
| download | renesas-bsp-39eee119052a1bb826bab60dcc5531ec34e3b4cf.tar.gz | |
thermal: rcar_gen3_thermal: Fix init value of IRQCTL register
Fix setting value for IRQCTL register. We are setting the last 6 bits
of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according
to Hardware manual values 1 are "setting prohibited" for Gen3.
Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from commit ed1b1ac1425b3d4399553411f305ce12fb3a6c54)
Signed-off-by: The Kinh Nguyen <the.nguyen.vx@renesas.com>
| -rw-r--r-- | drivers/thermal/rcar_gen3_thermal.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c index 7b51f966deff9..b3fa15bae4166 100644 --- a/drivers/thermal/rcar_gen3_thermal.c +++ b/drivers/thermal/rcar_gen3_thermal.c @@ -501,7 +501,7 @@ static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc) usleep_range(1000, 2000); - rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F); + rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0); rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2); |