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author | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2019-07-11 21:17:12 +0900 |
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committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2019-07-11 21:17:12 +0900 |
commit | ce83585d886fe9e329492839bcff4fd06045634c (patch) | |
tree | aae082a6bb185b384f342e21aa478eae4ab40d1a | |
parent | 45ba0548f01974501c695238a664ee9e555cf2bf (diff) | |
parent | 0879b952e2d32b44af82362bb5433b018cec60de (diff) | |
download | renesas-bsp-ce83585d886fe9e329492839bcff4fd06045634c.tar.gz |
Merge branch 'rcar-3.9.4/ehci_ohci.rc1' into v4.14.75-ltsi/rcar-3.9.6
* rcar-3.9.4/ehci_ohci.rc1:
phy: rcar-gen3-usb2: Correct VBUS behavior at over-current
-rw-r--r-- | drivers/phy/renesas/phy-rcar-gen3-usb2.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c index b4e5c7e144ca8..0d03c5d63afdb 100644 --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c @@ -1,7 +1,7 @@ /* * Renesas R-Car Gen3 for USB2.0 PHY driver * - * Copyright (C) 2015-2017 Renesas Electronics Corporation + * Copyright (C) 2015-2019 Renesas Electronics Corporation * * This is based on the phy-rcar-gen2 driver: * Copyright (C) 2014 Renesas Solutions Corp. @@ -67,6 +67,7 @@ USB2_OBINT_IDDIGCHG) /* VBCTRL */ +#define USB2_VBCTRL_OCCLREN BIT(16) #define USB2_VBCTRL_DRVVBUSSEL BIT(8) /* LINECTRL1 */ @@ -312,11 +313,15 @@ static int rcar_gen3_phy_usb2_init(struct phy *p) { struct rcar_gen3_chan *channel = phy_get_drvdata(p); void __iomem *usb2_base = channel->base; + u32 val; /* Initialize USB2 part */ writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE); writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); + val = readl(usb2_base + USB2_VBCTRL); + val &= ~USB2_VBCTRL_OCCLREN; + writel(val, usb2_base + USB2_VBCTRL); /* Initialize otg part */ if (channel->has_otg_pins) |