kernel/pci/
io.rs

1// SPDX-License-Identifier: GPL-2.0
2
3//! PCI memory-mapped I/O infrastructure.
4
5use super::Device;
6use crate::{
7    bindings, device,
8    devres::Devres,
9    io::{Io, IoRaw},
10    str::CStr,
11    sync::aref::ARef,
12};
13use core::ops::Deref;
14use kernel::prelude::*;
15
16/// A PCI BAR to perform I/O-Operations on.
17///
18/// # Invariants
19///
20/// `Bar` always holds an `IoRaw` inststance that holds a valid pointer to the start of the I/O
21/// memory mapped PCI BAR and its size.
22pub struct Bar<const SIZE: usize = 0> {
23    pdev: ARef<Device>,
24    io: IoRaw<SIZE>,
25    num: i32,
26}
27
28impl<const SIZE: usize> Bar<SIZE> {
29    pub(super) fn new(pdev: &Device, num: u32, name: &CStr) -> Result<Self> {
30        let len = pdev.resource_len(num)?;
31        if len == 0 {
32            return Err(ENOMEM);
33        }
34
35        // Convert to `i32`, since that's what all the C bindings use.
36        let num = i32::try_from(num)?;
37
38        // SAFETY:
39        // `pdev` is valid by the invariants of `Device`.
40        // `num` is checked for validity by a previous call to `Device::resource_len`.
41        // `name` is always valid.
42        let ret = unsafe { bindings::pci_request_region(pdev.as_raw(), num, name.as_char_ptr()) };
43        if ret != 0 {
44            return Err(EBUSY);
45        }
46
47        // SAFETY:
48        // `pdev` is valid by the invariants of `Device`.
49        // `num` is checked for validity by a previous call to `Device::resource_len`.
50        // `name` is always valid.
51        let ioptr: usize = unsafe { bindings::pci_iomap(pdev.as_raw(), num, 0) } as usize;
52        if ioptr == 0 {
53            // SAFETY:
54            // `pdev` valid by the invariants of `Device`.
55            // `num` is checked for validity by a previous call to `Device::resource_len`.
56            unsafe { bindings::pci_release_region(pdev.as_raw(), num) };
57            return Err(ENOMEM);
58        }
59
60        let io = match IoRaw::new(ioptr, len as usize) {
61            Ok(io) => io,
62            Err(err) => {
63                // SAFETY:
64                // `pdev` is valid by the invariants of `Device`.
65                // `ioptr` is guaranteed to be the start of a valid I/O mapped memory region.
66                // `num` is checked for validity by a previous call to `Device::resource_len`.
67                unsafe { Self::do_release(pdev, ioptr, num) };
68                return Err(err);
69            }
70        };
71
72        Ok(Bar {
73            pdev: pdev.into(),
74            io,
75            num,
76        })
77    }
78
79    /// # Safety
80    ///
81    /// `ioptr` must be a valid pointer to the memory mapped PCI BAR number `num`.
82    unsafe fn do_release(pdev: &Device, ioptr: usize, num: i32) {
83        // SAFETY:
84        // `pdev` is valid by the invariants of `Device`.
85        // `ioptr` is valid by the safety requirements.
86        // `num` is valid by the safety requirements.
87        unsafe {
88            bindings::pci_iounmap(pdev.as_raw(), ioptr as *mut c_void);
89            bindings::pci_release_region(pdev.as_raw(), num);
90        }
91    }
92
93    fn release(&self) {
94        // SAFETY: The safety requirements are guaranteed by the type invariant of `self.pdev`.
95        unsafe { Self::do_release(&self.pdev, self.io.addr(), self.num) };
96    }
97}
98
99impl Bar {
100    #[inline]
101    pub(super) fn index_is_valid(index: u32) -> bool {
102        // A `struct pci_dev` owns an array of resources with at most `PCI_NUM_RESOURCES` entries.
103        index < bindings::PCI_NUM_RESOURCES
104    }
105}
106
107impl<const SIZE: usize> Drop for Bar<SIZE> {
108    fn drop(&mut self) {
109        self.release();
110    }
111}
112
113impl<const SIZE: usize> Deref for Bar<SIZE> {
114    type Target = Io<SIZE>;
115
116    fn deref(&self) -> &Self::Target {
117        // SAFETY: By the type invariant of `Self`, the MMIO range in `self.io` is properly mapped.
118        unsafe { Io::from_raw(&self.io) }
119    }
120}
121
122impl Device<device::Bound> {
123    /// Maps an entire PCI BAR after performing a region-request on it. I/O operation bound checks
124    /// can be performed on compile time for offsets (plus the requested type size) < SIZE.
125    pub fn iomap_region_sized<'a, const SIZE: usize>(
126        &'a self,
127        bar: u32,
128        name: &'a CStr,
129    ) -> impl PinInit<Devres<Bar<SIZE>>, Error> + 'a {
130        Devres::new(self.as_ref(), Bar::<SIZE>::new(self, bar, name))
131    }
132
133    /// Maps an entire PCI BAR after performing a region-request on it.
134    pub fn iomap_region<'a>(
135        &'a self,
136        bar: u32,
137        name: &'a CStr,
138    ) -> impl PinInit<Devres<Bar>, Error> + 'a {
139        self.iomap_region_sized::<0>(bar, name)
140    }
141}
kernel/pci/io.rs

kernel/pci/
io.rs
