Struct Bar 

pub struct Bar<'a, const SIZE: usize = 0> { /* private fields */ }

A PCI BAR to perform I/O-Operations on.

I/O backend assumes that the device is little-endian and will automatically convert from little-endian to CPU endianness.

Invariants

Bar always holds an IoRaw instance that holds a valid pointer to the start of the I/O memory mapped PCI BAR and its size.

Implementations

impl<'a, const SIZE: usize> Bar<'a, SIZE>

pub fn into_devres(self) -> Result<Devres<Bar<'static, SIZE>>>

Consume the Bar and register it as a device-managed resource.

The returned Devres<Bar<'static, SIZE>> can outlive the original lifetime 'a. Access to the BAR is revoked when the device is unbound.

Methods from Deref<Target = Mmio<SIZE>>

pub fn relaxed(&self) -> &RelaxedMmio<SIZE>

Returns a RelaxedMmio reference that performs relaxed I/O operations.

Relaxed accessors do not provide ordering guarantees with respect to DMA or memory accesses and can be used when such ordering is not required.

Examples

use kernel::io::{
    Io,
    Mmio,
    RelaxedMmio,
};

fn do_io(io: &Mmio<0x100>) {
    // The access is performed using `readl_relaxed` instead of `readl`.
    let v = io.relaxed().read32(0x10);
}

Trait Implementations

impl<const SIZE: usize> Deref for Bar<'_, SIZE>

type Target = Mmio<SIZE>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl<const SIZE: usize> Drop for Bar<'_, SIZE>

fn drop(&mut self)

Executes the destructor for this type.

fn pin_drop(self: Pin<&mut Self>)

🔬This is a nightly-only experimental API. (pin_ergonomics)

Execute the destructor for this type, but different to Drop::drop, it requires self to be pinned.