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2022-11-05windows: Put name and version information into lspci/setpci executablesPali Rohár3-6/+27
Extend existing .in resource template file and generate resource objects also for lspci.exe and setpci.exe executables.
2022-11-05libpci: Add Intel Type 1 implementation for memory mapped systemsPali Rohár7-1/+433
Lot of non-x86 platforms also support Intel Type 1 mechanism. x86 IO ports CF8 and CFC are on these platforms mapped into standard memory space. Address mapping itself is platform or board specific and there is no default value. Lot of ARM boards with multiple PCIe controllers are multi-domain and each PCI domain has its own CF8/CFC (address/data) registers mapped into memory space. Add new mmio-conf1 backend which access CF8/CFC ports via MMIO and define new config option mmio-conf1.addrs which specify list of address/data register pairs in memory space for each PCI domain. Format of this option is: 0xaddr1/0xdata1,0xaddr2/0xdata2,...
2022-11-05libpci: Add auxiliary data member to struct pci_access for use by the back-endPali Rohár1-0/+1
2022-11-05libpci: Add new internal function pci_generic_scan_domain()Pali Rohár4-7/+16
Function pci_generic_scan() scans PCI domain 0. This new function pci_generic_scan_domain() scans specified PCI domain number.
2022-11-02lspci: Add support for CXL GPF Device DVSECJaxon Haws2-1/+56
Add Global Persistent Flush DVSEC decoding for CXL device according to DVSEC Revision ID 0. Decode GPF Phase 2 Duration and GPF Phase 2 Power. Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-10-31cxl: Fix Register Locator DVSEC decodingJaxon Haws2-9/+4
Fix decoding of register blocks by introducing offset to position calculation (8.1.9 of CXL 3.0 spec) and removed unused defines for Register Locator DVSEC. Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-10-30libpci: i386-io-windows.h: Improve ProcessUserModeIOPL error messagePali Rohár1-1/+2
Show error message from intel_setup_io() function into debug area instead of error area. This is what other backends do as intel_setup_io() is called during quite detect phase, which may fail. Also show human readable failure instead of magic code number.
2022-10-30Merge remote-tracking branch 'pali/win32-dll'Martin Mares8-28/+200
2022-10-30libpci: Put name and version information into DLL libraryPali Rohár3-1/+46
Generate rc file from in template and fill DLL name and DLL version from Makefile. It looks like that the only possible way via GNU tools to specify version information for DLL library is via text rc file compiled as COFF object file via GNU windres and linked into the final DLL library via GNU ld.
2022-10-30libpci: Do not call unversioned symbols from libpci itselfPali Rohár1-2/+2
Windows version of GNU LD has bugs which cause that linker would translate this unknown unversioned symbols to some random version. So change pci_fill_info() to pci_fill_info_v38() in lib/filter.c to ensure that last version of this function would be used also by Windows version of GNU LD linker. Before this change GNU LD translated this function call to symbol _pci_fill_info@LIBPCI_3.0. After this change GNU LD translate it to _pci_fill_info@LIBPCI_3.8.
2022-10-30libpci: Add support for building versioned shared Windows DLL library ↵Pali Rohár6-4/+116
libpci3.dll PE/COFF format, used by DLL libraries, does not support version symbols like ELF format. Recommendation from Microsoft for DLL symbol versioning is to use DLL API sets. But DLL API sets scheme requires for every API change to generated a new slim forwarding DLL library, which is unsuitable for distribution which wants just one DLL library with all version symbols. So instead of Microsoft recommended scheme for DLL versioning, use new different versioning scheme: Symbol is composed by function name, at (@) character and version string (version is same as for ELF targets). Symbol name without version information is added only into the DLL DEF file as alias to symbol with higest version. So linker at application link time resolves "unversioned" symbol to the versioned one via this alias and puts "versioned" symbol into final executable. This works fine if GNU LD is linking application via import library libpci3.dll.a generated from that DLL DEF file libpci3.def. But does not work when linking directly to the DLL library because library itself does not contain aliases. Note that GNU LD does not support linking to DEF file (it is required to first generated import library from DEF file). Note that older GNU LD versions have bug which cause generation of corrupted DLL files if some symbol contains dot (.) character. Hopefully this bug was fixed in GNU LD 2.21. At the end application lspci.exe requires library libpci3.dll with symbols pci_alloc@LIBPCI_3.0, pci_init@LIBPCI_3.5, pci_fill_info@LIBPCI_3.8 and therefore libpci3.dll stays backward compatible with future changes. PE/COFF executables can reference symbols either via name or via its ordinal number. Because DLL DEF files are generated from libpci version script and generator ver2def.pl preserves order of symbols, it means that ordinal numbers stay backward compatible unless order of lines in version script is changed. WARNINGS: GCC an GNU LD for Windows target have some bugs which cause that -fvisibility=hidden switch and __attribute__((visibility("default"))) does not work. Seems that they are broken and ignored when building DLL library. So instead use -Wl,--exclude-all-symbols switch with explicit DLL DEF file for building DLL library, which seems to work. This switch is supported since GNU LD 2.21. GNU LD has also another bug which results in broken DLL library if input DLL DEF file which describes symbols for exports, contains also symbol aliases via == operator. So do not specify symbol aliases in input DLL DEF file for building DLL library. Instead construct separate DLL DEF file for building libpci3.dll without symbol aliases and separate DLL DEF file libpci3.def with symbol aliases for building import library libpci3.dll.a suitable for linking into target applications. Note that operator == for symbol aliases is supported since GNU dlltool 2.21. Generate those two DLL DEF files via new script ver2def.pl from libpci.ver version script. So exported functions and version symbols would be defined only at one place in file libpci.ver. Note that GNU LD for Windows targets has also broken support for version scripts, it exports nonsense data and completely ignores version information. So always use only DLL DEF files generated by ver2def.pl script and never pass original version script to GNU LD. Due to another bugs in GNU dlltool, ordinals for aliased symbols from DLL DEF file are calculated incorrectly when building import library. So calculate ordinals manually in ver2def.pl script and explicitly put then into generated libpci3.def DLL DEF file for every symbol, including aliases. And because aliases are stored only in libpci3.def file (and in import library libpci3.dll.a generated from that DEF file) and not in DLL library libpci3.dll itself, it is required to link all libpci applications via import library and not directly to libpci3.dll. This is limitation of PE/COFF format used by DLL libraries. So for building Windows DLL library libpci3.dll is needed to use GNU binutils 2.21 or new.
2022-10-30Merge remote-tracking branch 'pali/win32-readeflags'Martin Mares1-6/+3
2022-10-30Merge remote-tracking branch 'pali/setpci-register-checks'Martin Mares1-124/+137
2022-10-30setpci: Check if standard register on device existPali Rohár1-125/+137
Some standard registers are available only on device with header type 0, some only on header type 1, some other only on header type 2 and some on header type 0 and 1. Add definitions which registers are available on which header type and add check to access only available registers.
2022-10-30Merge remote-tracking branch 'thesamesam/which-hunt'Martin Mares1-2/+2
2022-10-30Merge remote-tracking branch 'pali/win32-sysdbg'Martin Mares7-2/+326
2022-10-30lspci: Fix Virtual Channel VC# Caps: MaxTimeSlotsMikhail Bratchikov1-1/+1
2022-10-30lib: Fix PCI_L1PM_SUBSTAT_CAP_L1PM_SUPPMikhail Bratchikov1-1/+1
2022-10-30lib: Fix PCI_HT_SEC_CMD_DNMikhail Bratchikov1-1/+1
2022-10-30Merge remote-tracking branch 'sthibaul/master'Martin Mares1-8/+20
2022-10-30CXL: Code clean-upMartin Mares1-71/+64
- We now pass capability length and revision to functions instead of reading them from config space again and again. - Centralize fetching of the capability. - Add checks for overrunning capability length. - Avoid out-of-bounds reads from the array of register names. - Sort capability list by ID.
2022-10-30Merge remote-tracking branch 'jphaws/cxl'Martin Mares2-35/+252
2022-10-30Merge remote-tracking branch 'pali/lspci-tree-filter'Martin Mares1-34/+93
2022-10-29lspci: Fix filter support (-s/-d) for subtrees in tree mode (-t)Pali Rohár1-34/+93
2022-10-13cxl: Add placeholder for undecoded DVSECsBen Widawsky1-0/+15
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-10-13cxl: Add DVSEC Register LocatorBen Widawsky2-0/+49
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Co-authored-by: Jaxon Haws <jaxon.haws@amd.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-10-13cxl: Add support for DVSEC port capBen Widawsky2-6/+53
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Co-authored-by: Jaxon Haws <jaxon.haws@amd.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com> --- Add Viral Enable (Jonathan) Add missing tab (Jonathan) Add Alt Mem base/limit (Jonathan)
2022-09-30cxl: Implement more device DVSEC decodingBen Widawsky2-0/+88
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Co-authored-by: Jaxon Haws <jaxon.haws@amd.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com> --- Fix ranges (Pali): https://github.com/pciutils/pciutils/pull/59#discussion_r806335631
2022-09-30cxl: Rename caps to be device capsBen Widawsky2-27/+27
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Co-authored-by: Jaxon Haws <jaxon.haws@amd.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-09-30cxl: Rework caps to new functionBen Widawsky1-9/+23
This will help upcoming caps Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Co-authored-by: Jaxon Haws <jaxon.haws@amd.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-09-29cxl: Collect all DVSEC Device fieldsBen Widawsky2-1/+2
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Co-authored-by: Jaxon Haws <jaxon.haws@amd.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-09-29cxl: Make id check more explicitBen Widawsky1-3/+6
Currently only type 0 DVSEC caps are handled. Moving this check will allow more robust type handling in the future. Should be no functional change. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-09-29cxl: Rename variable to match other codeBen Widawsky1-10/+10
The current variable is word sized, and so this makes the CXL code match the rest of the code. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
2022-08-19hurd: fix filling informationSamuel Thibault1-8/+20
The hurdish methods only implement the region and base information, the rest should be taken from the generic method.
2022-08-10Maint: Tag releases with my new PGP keyMartin Mares1-1/+1
2022-08-10Avoid adding multiple version tags to the same symbolMartin Mares1-4/+8
This is apparently forbidden in most versions of binutils.
2022-06-20libpci: i386-io-windows.h: Do not define __readeflags() for GCC 4.9+Pali Rohár1-6/+3
GCC header file <x86intrin.h> defines static inline function __readeflags() which calls correct __builtin_ia32_readeflags_XX() builtin. Header file <x86intrin.h> is included by MinGW-w64's <intrin.h> header file in new versions of MinGW-w64 and <intrin.h> may be included transitionally by some other header files automatically. Defining __readeflags() as both macro and static inline function cause compile errors. Fix this compile error by not defining __readeflags() macro and instead include GCC header file <x86intrin.h>.
2022-06-19lib/configure: respect $PKG_CONFIG completelySam James1-1/+1
Signed-off-by: Sam James <sam@gentoo.org>
2022-06-19lib/configure: drop usage of whichSam James1-2/+2
'which' is not required by POSIX and is an external command which may not be available, and 'command -v' does the job just fine. Debian and Gentoo at least are both making efforts to drop which from their base system package list. Signed-off-by: Sam James <sam@gentoo.org>
2022-06-14setpci: Define CAPABILITIES registerPali Rohár1-0/+1
2022-06-10Makefile: Split variable for output shared library and import linking libraryPali Rohár2-5/+13
Use new variable $(PCIIMPLIB) for storing name of the libpci import library for linking with shared library $(PCILIB). This would allow compilation of lspci and setpci applications on systems where linking needs to be done with import library.
2022-06-10Makefile: Define ABI_VERSION variable without leading dotPali Rohár1-9/+9
This would simplify usage of ABI_VERSION variable for platforms which do not use leading dot in file names.
2022-06-10Makefile: Unify building of shared libpci libraryPali Rohár2-7/+6
Move Darwin and Linux/ELF platform link switches to new PCILIB_LDFLAGS variable.
2022-06-10Makefile: Fix usage of empty IDSDIRPali Rohár1-1/+9
When IDSDIR is empty then current lspci/setpci directory is assumed. So install PCI_IDS into SBINDIR in this case.
2022-06-10Makefile: Remove duplicate slash for $(DESTDIR) install targetPali Rohár1-1/+1
2022-04-18pcilib.man: Include information about win32-sysdbgPali Rohár1-0/+7
2022-04-18libpci: Add new windows NT sysdbg implementationPali Rohár6-2/+319
NT SysDbg interface allow access to the PCI config space. Only devices on the first domain are available and only first 256 bytes of the PCI config space can be accessed. Compared to intel-conf1 access, this API is race free as NT kernel serialize access to PCI I/O ports. This NT SysDbg API is used by the !pci command of 32-bit WinDbg kernel debugger for displaying PCI config space. Debug privilege is required to use this NT interface.
2022-04-18Released as 3.8.0.v3.8.0Martin Mares3-5/+5
2022-04-18Filters: Fixed symbol versioningMartin Mares1-4/+4
2022-04-16README and ChangeLog for 3.8.0.Martin Mares3-4/+42
2022-04-16Document new filter syntax in man pagesMartin Mares2-7/+8
2022-04-16Filters now support partially specified classes and also prog-if'sMartin Mares3-97/+187
Rewritten the filter parser, the old code was too twisted to extend.
2022-04-16pciutils.lsm: metalab.unc.edu is goneMartin Mares1-3/+0
2022-04-16Updated pci.ids to today's snapshotMartin Mares1-240/+2472
2022-04-16lspci: Fix detection of memory space barPali Rohár1-1/+1
intel-conf1 backend never show AtomicOpsCap: capabilities despite the fact that is successfuly detects memory bars on device. But other backends show this capability. Error is in device_has_memory_space_bar() function, it expects that ->size member is always filled. But size of the BAR is not available in PCI config space and therefore raw backends cannot retrieve it. Probably intention of the non-zero check was to verify that base address was filled with non-zero size. So either base address is non-zero or length is non-zero. Adjust check.
2022-04-16lspci: Fix detection of extended capabilitiesPali Rohár1-1/+1
Bus may report all-ones when trying to access non-existent extended space. Same check is also in lib/caps.c extended space parser.
2022-04-16lspci: Fix detection of virtual regionsPali Rohár1-23/+17
There are many issues with detection of virtual regions. 1. Variable for detecting virtual region is global and if one BAR is marked as virtual then all remaining BARs are treated as virtual too as this variable is not reset at next loop iteration. 2. Lower address is read from flg variable which on backends without config space is initialized from PCI flags, not from base address. 3. Code mixes at many places PCI flags, resource flags, PCI addresses and resource addresses. Some backends reports PCI flags in PCI addresses, some not. Cleanup mess of ->base_addr, ->flags and PCI_BASE_ADDRESS. If backend provides ->flags value (test via PCI_FILL_IO_FLAGS) then use it instead of reading flags from pci config space. Fix reading of PCI hw_lower and hw_upper addresses. If PCI_BASE_ADDRESS reports different type than what is stored in base_addr then completely ignore hw_lower and hw_upper values. It means that backend either provide fiction information or provide resources in different order as they are stored in hardware. In any case values from HW cannot be used as they do not match values reported by backend. And in the last case, make virtual variable local to the current BAR processing and do not increment loop variable i when 64-bit MEM type is detected via data from config space. It could miss some virtual resource reported by the backend. This change fixes displaying resources of PCI devices which have some unset/unused BARs in the middle and OS reports virtual regions and remaining regions without holes. E.g. HW BARs 0, 2, 5 are used and OS reports base_addr 0, 1, 2, 3.
2022-04-16lspci: Fix handling of truncated lines for msvcrt.dllPali Rohár1-1/+5
msvcrt.dll's vsnprintf() implementation does not fill terminating null byte when overflow occurs and buffer size is returned.
2022-04-15libpci: i386-io-windows.h: Fix error handling for GetProcessImageFileNameW() ↵Pali Rohár1-3/+67
and GetModuleFileNameExW() These functions may require buffer which is larger than MAX_PATH (wide) characters and their error handling is more complicated. Fix it.
2022-04-15libpci: i386-io-windows.h: Fix MinGW build with pre-4.00 MSVCRT runtime libraryPali Rohár1-4/+4
Like CRTDLL library, pre-4.00 MSVCRT runtime library does not provide I/O port functions.
2022-04-15libpci: Always call pci_set_name_list_path() in pci_init_name_list_path()Pali Rohár1-1/+4
If pci_init_name_list_path() does not call pci_set_name_list_path() then a->id_file_name variable is NULL and pci_load_name_list() would crash as it tries to do fopen(NULL, ...). If libpci was configured at compile time to use current executable path for locating pci.ids file and it is not possible to determinate current executable path then call pci_set_name_list_path() with just filename without path (this would fallback to the current working directory).
2022-04-15libpci: Compile windows i386-ports only for x86 CPUPali Rohár1-0/+2
There are already arm32 and arm64 port of MinGW-w64 toolchain.
2022-04-15fbsd-device: One more fixMartin Mares1-1/+1
Finishes the incomplete fix from 5c649bdcedfd823670dcbd74e9c38849d068db80.
2022-04-15Fix lspci: Power Management Control/Status PCI to PCI Bridge Support ExtensionsMikhail Bratchikov1-2/+2
2022-04-15README: Mention cfgmgr32 for WindowsPali Rohár1-1/+1
2022-04-15README: Update information about WindowsPali Rohár1-2/+12
Basic support for 64-bit systems is there.
2022-04-15pcilib.man: Include information about win32-cfgmgr32Pali Rohár1-0/+10
2022-04-15lspci: Do not access config space when it is emulatedPali Rohár3-8/+16
Emulated config space contains only few information so it could look like some valid config space. libpci compose emulated config space either from struct pci_dev or put some fake information (when struct pci_dev does not have them). To prevent showing to user fake/bogus information about PCI devices, show only information which are directly stored in struct pci_dev when emulated config space is used. Do it via setting lspci's header type to invalid value (byte)-1, so lspci code will handle device as unknown without trying to interpret values config space. This header type is set only in lspci, not in libpci, so other libpci applications would see valid config space. lspci users are probably not interested in fake information provided by libpci just for purpose to export syntactically valid config space. Information stored in struct pci_dev are the correct one (or rather what OS things that is correct).
2022-04-15libpci: Add windows cfgmgr32 implementationPali Rohár7-1/+1731
Access via cfgmgr32.dll library allows to list PCI devices and retrieve their basic properties and system resource configuration. Access is available to all users and should not require special privileges, access tokens, rights or permissions. This cfgmgr32.dll library does not provide access to PCI config space.
2022-04-15libpci: Implement virtual config space for provides without access to config ↵Pali Rohár4-0/+304
space Add a new pci_dev member no_config_access which signals that there is no access to config space for particular device. Reading operation in this case should return data from emulated virtual config space. For provides there is a new helper function pci_generic_read() which emulates config spaces based on struct pci_dev members.
2022-04-15lspci: Show information also for devices with unknown header typePali Rohár1-27/+108
lspci sees header type with 0x7f value in case config space is not accessible. It may be because of permission issues or missing backend (e.g. on Windows) or because device itself does not respond to config cycles and config space is inaccessible. Inaccessible config space is common scenario for switchable PCIe GPU cards. Some Nvidia and also some AMD cards when sleep then lspci sees all-ones in their config space. But kernel has registered those cards and some of their properties are cached ans available via sysfs or procfs (from time when card was awake). Currently lspci shows error message "Unknown header type 7f" and does not parse any value neither from config space nor from sysfs backend. So try to show at least information which kernel provided into libpci struct pci_dev. Set unknown values to zeros (instead of all-ones which are returned from config space) and add a new function show_htype_unknown() for showing additional information in case header type is unknown. This change will also help new windows backend which has only emulated config space and therefore valid data only in struct pci_dev.
2022-04-15libpci: Define some more PCI_IORESOURCE flags (compatible with ioport.h)Pali Rohár1-0/+6
These flags define mapping between PCI config space and system resources. So non-sysfs/procfs providers can fill these flags too.
2022-04-14Tried to fix the fbsd-device back-endMartin Mares1-5/+5
It was left broken by the fill_info reform.
2022-02-26pciutils: Add decode support for Data Object Exchange Extended CapabilityJonathan Cameron3-0/+355
PCI Data Object Exchange [1] provides a mailbox interface used as the transport for various protocols defined by PCI-SIG and others. Make the limited information in config space available. Note the Read/Write Mailbox registers themselves are not currently parsed as the usefulness of accessing one dword of a protocol is probably limited. In future, operating systems may provide means to safely query the supported protocols, but those have not yet been defined. Example output: Capabilities: [100 v1] Data Object Exchange DOECap: IntSup+ Interrupt Message Number 001 DOECtl: IntEn+ DOESta: Busy- IntSta- Error- ObjectReady+ [1] PCIe r6.0, sections 6.30 and 7.9.24 Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-02-26lspci: Decode PCIe 6.0 Slot Power Limit valuesPali Rohár1-9/+7
When the Slot Power Limit Scale field equals 00b (1.0x) and Slot Power Limit Value exceeds EFh, the following alternative encodings are used: F0h > 239 W and ≤ 250 W Slot Power Limit F1h > 250 W and ≤ 275 W Slot Power Limit F2h > 275 W and ≤ 300 W Slot Power Limit F3h > 300 W and ≤ 325 W Slot Power Limit F4h > 325 W and ≤ 350 W Slot Power Limit F5h > 350 W and ≤ 375 W Slot Power Limit F6h > 375 W and ≤ 400 W Slot Power Limit F7h > 400 W and ≤ 425 W Slot Power Limit F8h > 425 W and ≤ 450 W Slot Power Limit F9h > 450 W and ≤ 475 W Slot Power Limit FAh > 475 W and ≤ 500 W Slot Power Limit FBh > 500 W and ≤ 525 W Slot Power Limit FCh > 525 W and ≤ 550 W Slot Power Limit FDh > 550 W and ≤ 575 W Slot Power Limit FEh > 575 W and ≤ 600 W Slot Power Limit FFh Reserved for Slot Power Limit Values above 600 W Previously only values F0h, F1h and F2h were covered.
2022-02-10Merge remote-tracking branch 'github/master'Martin Mares1-4/+3
2022-02-10lspci: Replace find_driver() via libpci PCI_FILL_DRIVERPali Rohár1-40/+16
And implement this show_kernel() and show_kernel_machine() for all platforms.
2022-02-10libpci: sysfs: Implement support for PCI_FILL_DRIVERPali Rohár1-0/+14
In sysfs is driver name stored as symlink path of "driver" node.
2022-02-10libpci: proc: Implement support for PCI_FILL_DRIVERPali Rohár1-2/+20
File /proc/bus/pci/devices contains optional driver name in the last 18th field.
2022-02-10libpci: Define new string property PCI_FILL_DRIVERPali Rohár1-0/+1
This change extends libpci library and allows providers to fill PCI_FILL_DRIVER via native system APIs. As it is string property there is no need to increase ABI version. Intended usage in application is just: const char *driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER);
2022-02-10lspci: Do not show -[00]- bus in tree outputPali Rohár1-1/+3
Secondary or subordinate bus cannot be zero. Zero value could indicate either invalid secondary bus value or the fact that secondary bus value was not filled or indicates non-compliant PCI-to-PCI bridge. This change makes tree output better readable when bus numbers are not known or not provided.
2022-02-10lspci: Build tree based on PCI_FILL_PARENT informationPali Rohár2-5/+62
Topology reported by system (libpci provider) may be different from topology built based on primary/secondary/subordinate numbers from PCI bridges by lspci. This happens for example when some non-compliant PCI-to-PCI bridge with Type 0 header (e.g. Marvell one) is available in the system. So add additional edges reported by libpci when building tree in lspci.
2022-02-10libpci: sysfs: Implement support for PCI_FILL_PARENTPali Rohár1-0/+33
2022-02-10libpci: Add new option PCI_FILL_PARENTPali Rohár1-0/+2
This change extends libpci and allows providers to fill parent pci_dev. This is useful to retrieve topology as it is reported by the system itself.
2022-02-10lspci: Retrieve prog if, subsystem ids and revision id via libpciPali Rohár3-53/+27
Use pci_fill_info with CLASS_EXT and SUBSYS to fill this information. lspci in some places reads class from what libpci provider fills in dev->device_class and in some other places it reads directly from config space. In dev->device_class is stored class possible different class as in config space (e.g. if kernel is fixing class because device has bogus information stored in config space). With this change is class always read from dev->device_class which reflects and respects lspci -b option (Bus-centric view). Same applies for subsystem ids and revision id (note that prog if is part of class).
2022-02-10libpci: sysfs: Implement CLASS_EXT and SUBSYS supportPali Rohár1-2/+32
In sysfs there are optional nodes with this information.
2022-02-10libpci: generic: Implement SUBSYS also for PCI_HEADER_TYPE_BRIDGEPali Rohár1-0/+9
Subsystem ids for PCI Bridges are stored in extended capability PCI_CAP_ID_SSVID.
2022-02-10libpci: generic: Implement CLASS_EXT and SUBSYS supportPali Rohár1-0/+23
PCI_FILL_SUBSYS is implemented only for PCI_HEADER_TYPE_NORMAL and PCI_HEADER_TYPE_CARDBUS like in lspci.
2022-02-10libpci: Add new options for pci_fill_info: CLASS_EXT and SUBSYSPali Rohár1-0/+4
This change extends libpci library and allows providers to fill these informations (Programming interface, Revision id and Subsystem ids) via native system APIs, which sometimes may differs from what is stored in PCI config space. Programming interface is part of 24-bit Device Class number but apparently libpci exports only high 16-bit of this number via device_class member.
2022-02-10lspci: Use PCI_FILL_BRIDGE_BASES to detect if range behind bridge is ↵Pali Rohár1-9/+49
disabled or unsupported Show resources behind bridge as reported by PCI_FILL_BRIDGE_BASES. I/O or Prefetchable memory behind bridge is unsupported by bridge if both base and limit bridge registers are read-only and returns zero. So if base and limit registers returns zero (which is valid enabled range) and kernel reports that particular resource is disabled it means that resource is unsupported. Both I/O or Prefetchable memory resources are only optional.
2022-02-10libpci: Add support for filling bridge resourcesPali Rohár7-14/+73
Extend libpci API and ABI to fill bridge resources from sysfs.
2022-02-10lspci: Simplify printing range in show_range()Pali Rohár1-6/+1
Use just one printf() call with width format argument based on number of bits.
2022-02-10lspci: Show 16/32/64 bit width for address ranges behind bridgePali Rohár1-5/+6
Type of address range is encoded in lower bits.
2022-02-10Merge branch 'fill-info'Martin Mares7-98/+66
2022-02-10libpci: i386-io-windows.h: Fix comment about CRTDLLPali Rohár1-4/+3
There is no 64-bit version of CRTDLL library. MinGW-w64 provided bogus 64-bit import library for non-existent runtime DLL library, which was recently deleted.
2022-02-10lspci: Define PCI_U64_FMT_U format for printing u64Pali Rohár2-3/+7
Windows CRTDLL and MSVCRT runtime system libraries do not support %llu format string in printf. They support only %I64u format string. Fix this problem by providing PCI_U64_FMT_U macro in the same way as existing PCI_U64_FMT_X macro (for %llx). For C99 systems this PCI_U64_FMT_U macro is defined to C99 PRIu64 constant. This change fixes printing unsigned decimal 64-bit numbers by lspci on Window systems independently of used compiler (MinGW or MSVC).
2022-02-10lspci: Replace unsigned long long type by u64 and %llx format by PCI_U64_FMT_XPali Rohár2-4/+4
pciutils already provides and uses u64 type together with PCI_U64_FMT_X format macro for printing hex value of this type. So use u64 and PCI_U64_FMT_X also on other few remaining places. This change fixes printing hexadecimal 64-bit numbers by lspci on Window systems independently of used compiler (MinGW or MSVC).
2022-02-10pciutils: Remove #include <unistd.h> from files which do not need itPali Rohár3-3/+0
In more files is <unistd.h> header file included without any usage. MSVC does not provide this header file so remove this useless usage of <unistd.h> to allow compilation under MSVC.
2022-02-10libpci: For PCI_OS_WINDOWS include windows.h instead of windef.hPali Rohár1-2/+2
According to Win32 API guidelines applications should include <windows.h> instead of <windef.h>. This change fixes compilation under MSVC as MSVC <windef.h> header file expects that some other Win32 header files from <window.h> are already included.
2022-02-10libpci: For PCI_OS_WINDOWS define strncasecmp as alias for _strnicmpPali Rohár1-0/+1
CRTDLL, MSVCRT and UCRT runtimes provides strncasecmp()-like functionality in _strnicmp() function. As opposite of strcasecmp() for which there are _stricmp() and _strcmpi() variants, for strncasecmp() there is only _strnicmp() function. Without this change linking final setpci.exe executable undef MSVC fails.
2022-02-10libpci: For MSVC < 19.00 define snprintf outside of endian sectionPali Rohár1-1/+1
snprintf() macro is not endian specific and therefore should be declared outside of the endian section. This also fixes snprintf() function for new MinGW-w64 toolchains where snprintf() is defined as wrapper around _snprintf() which do not return negative value on overflow. libpci would call MinGW-w64 patched snprintf() function and not broken system function _snprintf().
2022-02-10libpci: For MSVC < 19.00 define vsnprintf as alias for _vsnprintfPali Rohár1-0/+3
MSVC prior version 19.00 do not have vsnprintf() function, only _vsnprintf().
2022-02-09Install lspci to /usr/bin on Linux systemsMartin Mares2-2/+7
On Linux, lspci is useful even for ordinary users, although only a subset of features is available.
2022-01-28README: Added a note on dynamic linking and derived worksMartin Mares1-0/+3
2022-01-21Simplified pci_fill_info() and friendsfill-infoMartin Mares7-98/+66
Previously, we kept track of which fields were already filled, which was quite brittle. Now we keep only the set of already known fields in struct pci_dev. We check if the current field is needed against this information. Not only this simplifies the whole thing, but it also enables future back-ends to call pci_fill_info() recursively as needed.
2022-01-21Another try at choosing the default compilerMartin Mares1-1/+5
Cross-compilers often provide only "gcc" and not "cc". So let's try "cc" when building natively and "gcc" when cross-compiling.
2022-01-21lspci: Improvements to PCIe link speed downgrade reportingMartin Mares1-8/+11
Do not report PCIe link downgrades for downstream ports. Changed wording so that "overdriven" is reported instead of "strange" for speeds greater than the maximum supported one. Also report nothing instead of "ok". Inspired by patches by Bjorn Helgaas and Matthew Wilcox.
2022-01-21pci.h: The error callback is now declared with PCI_NONRETMartin Mares2-2/+2
Users of the repeatedly complain that the library crashes, which is usually caused by providing an error hook which returns to the library. Let's try warning them more explicitly.
2022-01-21types.h: Introduced PCI_NONRETMartin Mares1-1/+3
2022-01-21lspci: Update tests files with VF 10-Bit Tag RequesterDongdong Liu3-6/+6
Update the tests files with the new field 10BitTagReq in SR-IOV Capabilities Register. Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
2022-01-21lspci: Decode VF 10-Bit Tag RequesterDongdong Liu2-4/+6
Decode VF 10-Bit Tag Requester Supported and Enable bit in SR-IOV Capabilities Register. Sample output: IOVCap: Migration- 10BitTagReq- Interrupt Message Number: 000 IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy- 10BitTagReq- Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
2022-01-21lspci: Bus mapping works in non-zero domainMartin Mares2-5/+7
2022-01-21Makefile: don't hardcode gccVladimír Čunát1-1/+1
I believe "cc" is a much better default nowadays. Another approach would be to (also) use "?=" for these variables.
2022-01-01libpci: i386-io-windows.h: Mute false-positive warningPali Rohár1-0/+1
i386-ports.c: In function ‘conf12_setup_io’: i386-io-windows.h:1021: warning: ‘old_token’ may be used uninitialized in this function i386-io-windows.h:1021: note: ‘old_token’ was declared here It is always properly initialized when accessed, just gcc compiler does not see it.
2022-01-01i386-ports: Do not mark pci_access in conf12_cleanup() as unusedPali Rohár1-1/+1
It is used as argument for intel_cleanup_io() function.
2021-12-28lib: Fix definition of strcasecmp() for PCI_OS_WINDOWSPali Rohár1-1/+1
UCRT, MSVCRT and CRTDLL runtime libraries provides only _strcmpi() function and not strcmpi(). MinGW32 has static libraries libcoldname.a and libmoldname.a which provides strcmpi() function (as link-time redirect to _strcmpi()). libcoldname.a is automatically linked when compiling for CRTDLL runtime and libmoldname.a for MSVCRT runtime. MinGW-w64 has only libmoldname.a library with strcmpi() function and it is linked to final executable only when compiling for MSVCRT runtime. when linking with MSVCRT. To prevent dependency on particular linking configuration and MinGW toolchain, use set strcasecmp() as alias to _strcmpi() function which is provided by any runtime library.
2021-12-28compat/getopt: Fix compatibility with non-GNU C libraryPali Rohár2-10/+23
Remove "#if defined(__GNU_LIBRARY__)" guard for getopt() function prototype in compat/getopt.h header file. The only purpose of compat/getopt.h header is to provide getopt() function prototype for compatibility purpose on every platform, specially those which do not use GNU C library (e.g. Windows). Without this change i586-mingw32msvc-gcc compiler complains that function getopt() is used without defined prototype. Also remove inclusion of #include <string.h> header file in compat/getopt.c source file. Probably due to compatibility purposes compat/getopt.c file has defined custom prototype for function strncmp() incompatible with C99 (length argument in C99 should be of type size_t). Including C99 prototype of strncmp() function from MinGW32 <string.h> header file cause compile errors for i586-mingw32msvc-gcc compiler. Instead of including <stringh> provides custom and simple my_strncmp() implementation. Thsi change fixes compilation of compat/getopt.c with i586-mingw32msvc-gcc, i686-w64-mingw32-gcc, x86_64-w64-mingw32-gcc and also MSVC cl compilers.
2021-12-28pciutils: Do not include compat/getopt.h on MinGW32 >= 3.0Pali Rohár1-1/+14
MinGW32 since version 3.0 declares getopt() function prototype in <unistd.h> header file.
2021-12-28Add PCIe 3.0+ decoding of the LnkCtl2 Compliance Preset/De-emphasis fieldLennert Buytenhek2-3/+32
As of PCIe 3.0, the LnkCtl2 "Compliance De-emphasis" field has been renamed to "Compliance Preset/De-emphasis", and there are several new bit encodings for various de-emphasis and preshoot combinations. The name of the PCI_EXP_LNKCTL2_COM_DEEMPHASIS() macro is not changed by this commit, as it is part of the libpci API. Reported-by: Tim CC Chen(陳志佳) <Tim.CC.Chen@wnc.com.tw> Signed-off-by: Lennert Buytenhek <buytenh@arista.com>
2021-12-28ls-tree: Fix handling of truncated linesMartin Mares1-9/+14
2021-12-28i386-ports: Added missing #include <string.h>Martin Mares1-0/+1
2021-12-28Makefile: Add compat/getopt.h into PCIINC dependency listPali Rohár1-0/+1
2021-12-27README: Add a note on C99Martin Mares1-1/+2
2021-12-27Renamed maint/RELEASE to appease case-insensitive filesystemsMartin Mares1-0/+0
2021-12-27lspci: Show Slot Power Limit values above EFhPali Rohár1-8/+22
PCI Express Base Specification rev. 3.0 has the following definition for the Slot Power Limit Value: ======================================================================= When the Slot Power Limit Scale field equals 00b (1.0x) and Slot Power Limit Value exceeds EFh, the following alternative encodings are used: F0h = 250 W Slot Power Limit F1h = 275 W Slot Power Limit F2h = 300 W Slot Power Limit F3h to FFh = Reserved for Slot Power Limit values above 300 W ======================================================================= Replace function power_limit() by show_power_limit() which also prints power limit value. Show reserved value as string ">300W".
2021-12-26libpci: Fix intel_sanity_check() functionPali Rohár1-0/+1
Function intel_sanity_check() calls conf1_read() which access d->domain field. But intel_sanity_check() does not initialize this field and so conf1_read() access some random data on stack. Tests showed that intel_sanity_check() always fails as in d->domain is stored some non-zero number. Fix this issue by zeroing struct pci_dev d in intel_sanity_check() as sanity check is verifying PCI devices at domain 0.
2021-12-26lspci: Print buses of multibus PCI domain in ascending orderPali Rohár2-4/+9
Currently PCI domains are printed in ascending order. Devices on each PCI bus are also printed in ascending order. PCI buses behind PCI-to-PCI bridges are also printed in ascending order. But buses of PCI domain are currently printed in descending order because function new_bus() puts newly created bus at the beginning of linked list. In most cases PCI domain contains only one (top level) bus, so in most cases it is not visible this inconsistency. Multibus PCI domains (where PCI domain contains more independent top level PCI buses) are available on ARM devices. This change fixes print order of multibus PCI domains, so also top level PCI buses are printed in ascending order, like PCI buses behind PCI-to-PCI bridges.
2021-12-26intel_cleanup_io() no longer returns a valueMartin Mares9-20/+14
The value was quite misleading, as witnessed by multiple implementations doing it wrong. In fact, the only return value which ever made sense was -1.
2021-12-26dump: Allow more leading zeros in dump line numberPali Rohár1-1/+3
U-Boot's "pci display.b" command prints pci config space dump with 8 digits in line number. So allow up to the 8 digits in line number to easily parse U-Boot's pci config space dumps.
2021-12-26README: Update information how to compile Windows portPali Rohár1-0/+7
2021-12-26win32: Remove old config.h and config.mk filesPali Rohár2-19/+0
These files are old and cannot be used for compiling pcitutils anymore (e.g. they use non-existent option TOOLPREFIX). As configure script now works fine also for Windows build, remove these old win32 config files.
2021-12-26configure: Generate config files for PCI_OS_WINDOWSPali Rohár1-3/+9
This change adds support for using configure script for cross-compiling pciutils on Linux for Windows platforms. Following command can be used to compile pcitils for Windows platform: make CROSS_COMPILE=i586-mingw32msvc- HOST=i386-windows ZLIB=no IDSDIR=. PCI_OS_WINDOWS does not support BSD DNS functions, so do not automatically enable DNS support. Library ioperm is cygwin specific and is used only for PCI_OS_CYGWIN.
2021-12-26Makefile: Add new option COMPAT_GETOPTPali Rohár1-2/+8
This new option controls if compat/getopt.c should be compiled and linked into lspci and setpci binaries. Useful for ancient platforms. For example it is required to set COMPAT_GETOPT=yes for all versions of MinGW32 with CRTDLL (as this MinGW32 variant does not have linkable getopt() implementation). And also for MinGW32 with MSVCRT older than 3.0.
2021-12-26Makefile: Append EXEEXT variable to executable filename rulesPali Rohár3-9/+14
If x86_64-w64-mingw32-gcc compiler is called with -o filename option without any file extension then compiler automatically appends suffix ".exe" to output filename. This behavior of x86_64-w64-mingw32-gcc compiler basically breaks pattern rule of type '%: %.o' as x86_64-w64-mingw32-gcc compiler cannot generate arbitrary output file via -o option just by stripping .o extension from filename. When generating executables by x86_64-w64-mingw32-gcc compiler it is really the best option to specify .exe suffix in -o option. So introduce a new makefile variable EXEEXT which will be automatically appended to any executable filename. For Windows and DOS systems set it to ".exe". For other systems set it just to empty string "". GNU automake uses same makefile variable for same purpose.
2021-12-26Factored out initialization of name list pathMartin Mares1-7/+21
2021-12-26libpci: For PCI_OS_WINDOWS allows to load pci.ids from executable directoryPali Rohár2-1/+26
For Windows applications it is common to have all support data files in the same directory where is stored executable itself, instead of in directory hardcoded at compile time. When PCI_PATH_IDS_DIR is set to "." it means that pci.ids file is located in the current working directory. This is also unsuitable for Windows command line applications stored in %PATH% because cmd.exe starts in some default user or system location. Adds a new option to allow specifying PCI_PATH_IDS_DIR to empty string "" and for PCI_OS_WINDOWS platform it would mean to locate pci.ids file in the same directory where is stored currently running executable. On Windows it is always possible to detected this directory.
2021-12-26libpci: i386-io-windows.h: Enable I/O access via native NT ↵Pali Rohár2-30/+1185
ProcessUserModeIOPL syscall libpci uses WinIo library from http://www.internals.com/ which is archived at https://web.archive.org/web/20151005172744/http://www.internals.com/ This external WinIo library has two big issues: 1. Library license is incompatible with pciutils license. 2. It silently and automatically installs 3rd-party NT kernel module WinIo.sys which is bundled in WinIO.dll binary. That NT kernel module creates a device file "\\.\WinIo" which can be opened by any running process. Via this device file can any process (including unprivileged or those running under Guest account) ask that kernel module to configure x86 TSS I/O port permissions for access to any I/O port. That NT kernel module does not implement any permission checks and automatically accept all requests. Change in this commit replaces insecure WinIO.dll library and WinIo.sys kernel module by proper NT system solution: Usage of ProcessUserModeIOPL syscall (equivalent of iopl(3) on Linux) which is supported directly by NT kernel. It does not require any external 3rd-party library or NT kernel module. This syscall can be invoked by NtSetInformationProcess() function from ntdll.dll library (which is part of NT system) and for privileged processes kernel changes x86 IOPL to 3. Privileged process is that which has SeTcbPrivilege (Act as part of the operating system privilege) or is running under account from local Administrators group with SeImpersonatePrivilege (Impersonate a client after authentication privilege). SeImpersonatePrivilege is enabled by default for accounts from local Administrators group. Usage of privileges is not easy operation and needs to call lot of functions to gain required permissions, achieve thread-safety and follow suggested guidelines. Hence code is quite long. Privileges (including SeTcbPrivilege) can be enabled / disabled in User Accounts settings by local Administrators and change takes effect after next login, not immediately.
2021-12-26libpci: i386-io-windows.h: Fix definitions of I/O port functions for UCRT, ↵Pali Rohár1-1/+69
CRTDLL and for 64-bit mode Functions _outp(), _outpw(), _outpd(), _inp(), _inpw() and _inpd() are available only in 32-bit version of the old MSVCRT library. They are not available in 64-bit version of old MSVCRT library and neither the oldest CRTDLL library or in new UCRT library. Function prototypes for 32-bit mode should be available in <conio.h> header file. But they are missing in some MinGW toolchains. For 64-bit mode I/O port functions are defined only as inline functions or intrinsics macros in <intrin.h> header file but under different names: __outbyte(), __outword(), __outdword(), __inbyte(), __inword(), __indword() This header file is available also in UCRT-compatible compilers. When compiling with the oldest CRTDLL library and not using <intrin.h> header file, it is required to provide own implementation of these functions. Do it via inline assembly. With this change it is possible to compile i386-io-windows.h with all combination of toolchains, compilers, crt library and arch mode. The most important is the fix to allow compilation with modern UCRT library.
2021-12-26libpci: i386-io-windows.h: Skip I/O setup on 16/32-bit non-NT systemsPali Rohár1-0/+11
16/32-bit non-NT systems allow applications to access PCI I/O ports without any special setup.
2021-12-26Cleaned up previous commitMartin Mares1-4/+4
2021-12-26Fix the primitive system dependency discovery for Darwin systemsLaurin-Luis Lehning1-2/+4
2021-12-26Man pages: clarify pci.ids locationRobert Elliott3-2/+7
Include both the path and filename of pci.ids in the pci.ids man page and the update-pciids man page
2021-12-26update-pciids man page: add cross-referencesRobert Elliott1-1/+6
Add cross-references to gzip, bzip2, curl, wget, and lynx.
2021-12-26man pages: update cross-references to pci.idsRobert Elliott1-1/+1
In the update-pciids man page: * remove reference to setpci, since that does not use pci.ids * add reference to pci.ids Fixes: ef5b622f488e ("Added a man page for pci.ids")
2021-12-26Makefile: Update uninstall target to match all install* targetsMartin Mares1-1/+10
2021-12-26add missing symlinks to libraries in install-lib targetAlex Domingo1-0/+2
2021-12-26Makefile: fix for parallel builds (make -j)Zachary T Welch1-1/+1
2021-12-26HWDB: Handle NULL returned by udev_list_entry_get_*Martin Mares1-2/+9
Based on a patch by <lixiaokeng@huawei.com>.
2021-12-26Fix malloc error handling when pci_access is not fully initializedMartin Mares1-27/+29
There were multiple cases, in which malloc failure was either unchecked, or a->error was called even though it was NULL.
2020-12-06lspci: Add PCIe 6.0 data rate (64 GT/s) supportGustavo Pimentel1-0/+4
This enables "lspci" to show PCIe 6.0 data rate (64 GT/s) properly according to the contents in register PCI_EXP_LNKCAP, PCI_EXP_LNKSTA and PCI_EXP_LNKCTL2. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2020-12-06HWDB: Fixed memory leakMartin Mares1-0/+1
2020-12-06Merge branch 'master' of https://github.com/nmoinvaz/pciutilsMartin Mares1-1/+1
2020-12-06Merge branch 'master' of https://github.com/rohit-mundra/pciutilsMartin Mares1-1/+2
2020-12-06Merge branch 'pu/update-pciids' of https://github.com/guillemj/pciutilsMartin Mares1-4/+5
2020-12-06Merge branch 'pu/buildsys' of https://github.com/guillemj/pciutilsMartin Mares3-6/+15
2020-12-06Merge branch 'pu/typos' of https://github.com/guillemj/pciutilsMartin Mares6-14/+14
2020-11-20Fixed MSAN errnum use-of-uninitialized value warning. gzerror is not ↵Nathan Moinvaziri1-1/+1
guaranteed to set errnum so we initialized it to 0.
2020-10-30Added five nibbles for domain in dump readRohit Mundra1-1/+2
Allow five nibbles as valid domain, when reading from a dump file with domain
2020-09-23update-pciids: Make the backup with a hardlink instead of a moveGuillem Jover1-1/+1
If we move the file while making a backup, we can end up with no pci.ids database in case the next step fails.
2020-09-23update-pciids: Fix spacing styleGuillem Jover1-1/+2
Fix code alignment by using a hard-tab instead of 4 spaces. Add a blank line after set -e.
2020-09-23update-pciids: Move quiet setting after set -eGuillem Jover1-2/+2
We should set -e as the first thing to catch any errors, so move the quiet setup after the other variables setup.
2020-09-16Fix typosGuillem Jover6-14/+14
Signed-off-by: Guillem Jover <guillem@hadrons.org>
2020-09-16pkgconfig: Fix libpci.pc for static linkingBrice Goglin2-2/+3
The libpci.pc file does not seem to be correct for static linking. $ pkg-config --libs --static libpci -lpci It brings no dependencies while -lresolv (and likely -lz) seems needed: /usr/lib/gcc/x86_64-linux-gnu/4.7/../../../x86_64-linux-gnu/ libpci.a(names-net.o):function pci_id_net_lookup: error: undefined reference to '__res_query' Something like: Libs.private: -lresolv -lz Signed-off-by: Guillem Jover <guillem@hadrons.org>
2020-09-16configure: Add support for GNU/HurdDamien Zammit1-1/+5
This handles the case when the HOST has not been specified by the user. Signed-off-by: Guillem Jover <guillem@hadrons.org>
2020-09-16configure: Support cross-building for GNU/kFreeBSDGuillem Jover1-3/+7
We need to set a sys variable matching what would be found in the GNU triplet for the GNU/kFreeBSD architecture, otherwise the later code will not match correctly. Signed-off-by: Guillem Jover <guillem@hadrons.org>
2020-09-02lspci: Decode 10-Bit Tag Requester EnableDongdong Liu2-1/+3
Decode 10-Bit Tag Requester Enable bit in Device Control 2 Register. Sample output changes: - DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled, ARIFwd- + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- 10BitTagReq- OBFF Disabled, ARIFwd- Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
2020-09-02lspci: Adjust PCI_EXP_DEV2_* to PCI_EXP_DEVCTL2_* macro definitionDongdong Liu2-22/+24
Adjust PCI_EXP_DEV2_* to PCI_EXP_DEVCTL2_* macro definition to keep the same style between the Linux kernel source [1] and lspci. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/linux/pci_regs.h#n651 Suggested-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
2020-09-02pciutils: Add decode support for RCECsSean V Kelley4-4/+364
Root Complex Event Collectors provide support for terminating error and PME messages from RCiEPs. This patch provides basic decoding for the lspci RCEC Endpoint Association Extended Capability. See PCIe 5.0-1, sec 7.9.10 for further details. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Sean V Kelley <sean.v.kelley@linux.intel.com>
2020-06-06Merge pull request #42 from jlledom/hurd-method-fixesMartin Mareš1-4/+2
Hurd: bug fixes and compile again
2020-06-06Hurd: bug fixes and compile againJoan Lledó1-4/+2
2020-05-31Hurd: Do not identify devices during scanMartin Mares1-11/+0
Let us keep the bus scan light-weight. Whoever is interested in device IDs, still has to call pci_fill_info(PCI_FILL_IDENT), which handles this in generic way.
2020-05-31Hurd: Simplification continuesMartin Mares1-21/+7
2020-05-31Hurd: Simplify config space read and writeMartin Mares1-26/+20
2020-05-31Hurd: Further simplificationMartin Mares1-25/+15
2020-05-31Merge remote-tracking branch 'jlledom/hurd-fix-dev-aux'Martin Mares1-16/+47
2020-05-31HURD backend should compile againMartin Mares1-2/+1
Fixes a bug introduced by commit 82c06b47dea5a38075ce9d56f743360bc47b4c78.
2020-05-31Hurd: avoid redundant checks for port validityJoan Lledó1-7/+6
2020-05-31HURD: Use MACH_PORT_NULL to initialize the portJoan Lledó1-3/+3
2020-05-31Hurd: Fix multiline stringsJoan Lledó1-4/+3
2020-05-31Maintainer scripts: Fixed a typo in release.pmMartin Mares1-1/+1
2020-05-31Released as 3.7.0.v3.7.0Martin Mares3-3/+35
2020-05-31Updated pci.ids to today's snapshotMartin Mares1-16/+455
2020-05-27CXL: Capability vendor ID changedSean V Kelley1-95/+108
Update the cap-dvsec-cxl test to match the new vendor ID. Signed-off-by: Sean V Kelley <sean.v.kelley@linux.intel.com>
2020-05-26sysfs: Adjusted handling of PCI_FILL_IOMMU_GROUP to recent flag semanticsMartin Mares1-0/+1
2020-05-26lspci: Print IOMMU groups with -vAlex Xu (Hello71)4-4/+25
2020-05-25lspci: Cleaned up printing of resizable BARsMartin Mares1-62/+23
Adjusted the output to better match the rest of lspci. Made the code more straightforward.
2020-05-25lspci: Decode the (virtual) resizeble BAR capabilityMartin Mares2-2/+388
A patch by Paul Blinzer.
2020-05-25Library: Handle domains in all back-endsMartin Mares6-20/+24
Even if the back-end does not implement multiple domains, it can be called on a device in a non-zero domain if the use obtained the device by calling pci_get_dev() instead of scanning the bus. In all such cases, report that 0 bytes were read/written.
2020-05-25Library: Big cleanup of pci_fill_info()Martin Mares7-89/+159
There was a lot of minor issues in the implementation of the fill_info call-back in various back-ends. Most importantly, semantics of pci_dev-> known_fields was not formally defined and it was implemented inconsistently. We now define known_fields as the set of fields which were already obtained during the lifetime of the pci_dev. We never consider known fields which are not supported by the back-end. All fields which are unsupported by either the back-end, the OS, or the particular device, are guaranteed to have sensible default values (0 or NULL). Also, bit masks are always unsigned except for the signature of pci_fill_info() which should be preferably kept stable. All back-ends and the pci_generic_fill_info() function have been changed to follow this semantics. In the sysfs back-end, we read as few attributes as possible during device initialization, so applications which use pci_get_dev() are not slowed down unnecessarily. In the Hurd back-end, we also respect the buscentric mode.
2020-05-25CXL: Capability vendor ID changedMartin Mares2-2/+3
Reported by Sean V Kelley <sean.v.kelley@linux.intel.com> on the linux-pci list.
2020-05-25lspci: Generelized decoding of DVSEC extended capabilityMartin Mares1-42/+16
We decode the DVSEC capability header first. If we recognize the vendor and ID (and the length is at least the minimum we need), we call a specific function to interpret the rest of the capability.
2020-05-25Tests: cap-dvsec was superseded by cap-dvsec-cxlMartin Mares1-340/+0
2020-05-25Tests: cap-dvsec-cxl had tabs erroneously expanded to spacesMartin Mares1-83/+83
2020-05-25pciutils: Decode Compute eXpress Link DVSECSean V Kelley3-1/+415
Compute eXpress Link[1] is a new CPU interconnect created with workload accelerators in mind. The interconnect relies on PCIe electrical and physical interconnect for communication via a Flex Bus port which allows designs to choose between providing PCIe or CXL. This patch introduces basic support for lspci decode of CXL and builds upon the existing Designated Vendor-Specific support in lspci through identification of a supporting CXL device using DVSEC Vendor ID and DVSEC ID. [1] https://www.computeexpresslink.org/ Signed-off-by: Sean V Kelley <sean.v.kelley@linux.intel.com>
2020-05-25pciutils: Decode available DVSEC detailsSean V Kelley3-1/+368
Instead of current generic 'unknown' output for DVSEC, decode details on Vendor ID, Rev, etc. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Sean V Kelley <sean.v.kelley@linux.intel.com>
2020-05-25lspci: Use commas more consistentlyBjorn Helgaas2-13/+13
General practice has been to use a comma after a multi-word item, but omit commas between single-bit flags. Do this more consistently. Sample output changes: - LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ + LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk+ - DevCap2: Completion Timeout: Not Supported, TimeoutDis-, NROPrPrP-, LTR+ + DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR+ - 10BitTagComp-, 10BitTagReq-, OBFF Not Supported, ExtFmt-, EETLPPrefix- + 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix- - FRS-, ARIFwd- + FRS- ARIFwd- Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-05-25lspci: Decode PCIe Link Capabilities 2, expand Link Status 2Bjorn Helgaas3-2/+1418
Decode Link Capabilities 2, which includes the Supported Link Speeds Vector, and decode more fields of Link Status 2. The test case (data from https://bugzilla.kernel.org/show_bug.cgi?id=206837 comment #21) includes a Thunderbolt Downstream Port that advertises 2.5-8GT/s support in Link Capabilities 2. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-03-29Maint: Reorganization of my directory structureMartin Mares1-1/+1
2020-03-22Hurd: Fix minor indentation problemsJoan Lledó1-2/+2
2020-03-22Hurd: Fix bug: pci_get_dev() and dev->auxJoan Lledó1-12/+45
Allow clients to read and write from a device w/o a bus scan