cxl: Collect all DVSEC Device fields

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Co-authored-by: Jaxon Haws <jaxon.haws@amd.com>
Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>

2 files changed, 2 insertions, 1 deletions

diff --git a/lib/header.h b/lib/header.h
index 525b910..71f7fb0 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -1069,6 +1069,7 @@
 #define PCI_DVSEC_ID_CXL	0	/* Designated Vendor-Specific ID for Intel CXL */
 
 /* PCIe CXL Designated Vendor-Specific Capabilities, Control, Status */
+#define PCI_CXL_DEV_LEN 0x38 /* CXL Device DVSEC Length */
 #define PCI_CXL_CAP		0x0a	/* CXL Capability Register */
 #define  PCI_CXL_CAP_CACHE	0x0001	/* CXL.cache Protocol Support */
 #define  PCI_CXL_CAP_IO		0x0002	/* CXL.io Protocol Support */
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 196a7be..b080a19 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -701,7 +701,7 @@ cap_dvsec_cxl(struct device *d, int id, int where)
   if (id != 0)
     return;
 
-  if (!config_fetch(d, where + PCI_CXL_CAP, 12))
+  if (!config_fetch(d, where + PCI_CXL_CAP, PCI_CXL_DEV_LEN - PCI_CXL_CAP))
     return;
 
   w = get_conf_word(d, where + PCI_CXL_CAP);