diff options
Diffstat (limited to 'include/asm-ia64/sn/sn2')
| -rw-r--r-- | include/asm-ia64/sn/sn2/addrs.h | 4 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/arch.h | 3 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/intr.h | 8 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/io.h | 10 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/mmzone_sn2.h | 165 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/shub.h | 2 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/shub_md.h | 2 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/shub_mmr.h | 8 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/shub_mmr_t.h | 2 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/shubio.h | 144 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/slotnum.h | 2 | ||||
| -rw-r--r-- | include/asm-ia64/sn/sn2/sn_private.h | 21 |
12 files changed, 100 insertions, 271 deletions
diff --git a/include/asm-ia64/sn/sn2/addrs.h b/include/asm-ia64/sn/sn2/addrs.h index ba12fbd2eed953..c415366196bffc 100644 --- a/include/asm-ia64/sn/sn2/addrs.h +++ b/include/asm-ia64/sn/sn2/addrs.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_SN2_ADDRS_H @@ -57,7 +57,7 @@ typedef union ia64_sn2_pa { #define LOCAL_MEM_SPACE 0xc000010000000000 /* Local Memory space */ #define GLOBAL_MMR_SPACE 0xc000000800000000 /* Global MMR space */ #define GLOBAL_PHYS_MMR_SPACE 0x0000000800000000 /* Global Physical MMR space */ -#define GET_SPACE 0xc000001000000000 /* GET space */ +#define GET_SPACE 0xe000001000000000 /* GET space */ #define AMO_SPACE 0xc000002000000000 /* AMO space */ #define CACHEABLE_MEM_SPACE 0xe000003000000000 /* Cacheable memory space */ #define UNCACHED 0xc000000000000000 /* UnCacheable memory space */ diff --git a/include/asm-ia64/sn/sn2/arch.h b/include/asm-ia64/sn/sn2/arch.h index d630ed226f11e9..f31578259dd6a7 100644 --- a/include/asm-ia64/sn/sn2/arch.h +++ b/include/asm-ia64/sn/sn2/arch.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_SN2_ARCH_H #define _ASM_IA64_SN_SN2_ARCH_H @@ -46,6 +46,7 @@ #define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8) +#define CNASID_MASK_BYTES (NASID_MASK_BYTES / 2) /* diff --git a/include/asm-ia64/sn/sn2/intr.h b/include/asm-ia64/sn/sn2/intr.h index 09cb8319474c6a..d021292d9bf159 100644 --- a/include/asm-ia64/sn/sn2/intr.h +++ b/include/asm-ia64/sn/sn2/intr.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_SN2_INTR_H #define _ASM_IA64_SN_SN2_INTR_H @@ -14,13 +14,17 @@ // These two IRQ's are used by partitioning. #define SGI_XPC_ACTIVATE (0x30) +#define SGI_II_ERROR (0x31) +#define SGI_XBOW_ERROR (0x32) +#define SGI_PCIBR_ERROR (0x33) #define SGI_XPC_NOTIFY (0xe7) -#define IA64_SN2_FIRST_DEVICE_VECTOR (0x31) +#define IA64_SN2_FIRST_DEVICE_VECTOR (0x34) #define IA64_SN2_LAST_DEVICE_VECTOR (0xe6) #define SN2_IRQ_RESERVED (0x1) #define SN2_IRQ_CONNECTED (0x2) +#define SN2_IRQ_SHARED (0x4) #define SN2_IRQ_PER_HUB (2048) diff --git a/include/asm-ia64/sn/sn2/io.h b/include/asm-ia64/sn/sn2/io.h index b0c928f0191735..eff4f8641b1505 100644 --- a/include/asm-ia64/sn/sn2/io.h +++ b/include/asm-ia64/sn/sn2/io.h @@ -32,8 +32,8 @@ __sn_inb (unsigned long port) unsigned char ret; ret = *addr; - sn_dma_flush((unsigned long)addr); __sn_mf_a(); + sn_dma_flush((unsigned long)addr); return ret; } @@ -44,8 +44,8 @@ __sn_inw (unsigned long port) unsigned short ret; ret = *addr; - sn_dma_flush((unsigned long)addr); __sn_mf_a(); + sn_dma_flush((unsigned long)addr); return ret; } @@ -56,8 +56,8 @@ __sn_inl (unsigned long port) unsigned int ret; ret = *addr; - sn_dma_flush((unsigned long)addr); __sn_mf_a(); + sn_dma_flush((unsigned long)addr); return ret; } @@ -103,6 +103,7 @@ __sn_readb (void *addr) unsigned char val; val = *(volatile unsigned char *)addr; + __sn_mf_a(); sn_dma_flush((unsigned long)addr); return val; } @@ -113,6 +114,7 @@ __sn_readw (void *addr) unsigned short val; val = *(volatile unsigned short *)addr; + __sn_mf_a(); sn_dma_flush((unsigned long)addr); return val; } @@ -123,6 +125,7 @@ __sn_readl (void *addr) unsigned int val; val = *(volatile unsigned int *) addr; + __sn_mf_a(); sn_dma_flush((unsigned long)addr); return val; } @@ -133,6 +136,7 @@ __sn_readq (void *addr) unsigned long val; val = *(volatile unsigned long *) addr; + __sn_mf_a(); sn_dma_flush((unsigned long)addr); return val; } diff --git a/include/asm-ia64/sn/sn2/mmzone_sn2.h b/include/asm-ia64/sn/sn2/mmzone_sn2.h deleted file mode 100644 index e495529d78737c..00000000000000 --- a/include/asm-ia64/sn/sn2/mmzone_sn2.h +++ /dev/null @@ -1,165 +0,0 @@ -#ifndef _ASM_IA64_SN_MMZONE_SN2_H -#define _ASM_IA64_SN_MMZONE_SN2_H - -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2000-2002 Silicon Graphics, Inc. All rights reserved. - */ - -#include <linux/config.h> - - -/* - * SGI SN2 Arch defined values - * - * An SN2 physical address is broken down as follows: - * - * +-----------------------------------------+ - * | | | | node offset | - * | unused | node | AS |-------------------| - * | | | | cn | clump offset | - * +-----------------------------------------+ - * 6 4 4 3 3 3 3 3 3 0 - * 3 9 8 8 7 6 5 4 3 0 - * - * bits 63-49 Unused - must be zero - * bits 48-38 Node number. Note that some configurations do NOT - * have a node zero. - * bits 37-36 Address space ID. Cached memory has a value of 3 (!!!). - * Chipset & IO addresses have other values. - * (Yikes!! The hardware folks hate us...) - * bits 35-0 Node offset. - * - * The node offset can be further broken down as: - * bits 35-34 Clump (bank) number. - * bits 33-0 Clump (bank) offset. - * - * A node consists of up to 4 clumps (banks) of memory. A clump may be empty, or may be - * populated with a single contiguous block of memory starting at clump - * offset 0. The size of the block is (2**n) * 64MB, where 0<n<9. - * - * Important notes: - * - IO space addresses are embedded with the range of valid memory addresses. - * - All cached memory addresses have bits 36 & 37 set to 1's. - * - There is no physical address 0. - * - * NOTE: This file exports symbols prefixed with "PLAT_". Symbols prefixed with - * "SN_" are intended for internal use only and should not be used in - * any platform independent code. - * - * This file is also responsible for exporting the following definitions: - * cnodeid_t Define a compact node id. - */ - -typedef signed short cnodeid_t; - -#define SN2_BANKS_PER_NODE 4 -#define SN2_NODE_SIZE (64UL*1024*1024*1024) /* 64GB per node */ -#define SN2_BANK_SIZE (SN2_NODE_SIZE/SN2_BANKS_PER_NODE) -#define SN2_NODE_SHIFT 38 -#define SN2_NODE_MASK 0x7ffUL -#define SN2_NODE_OFFSET_MASK (SN2_NODE_SIZE-1) -#define SN2_NODE_NUMBER(addr) (((unsigned long)(addr) >> SN2_NODE_SHIFT) & SN2_NODE_MASK) -#define SN2_NODE_CLUMP_NUMBER(kaddr) (((unsigned long)(kaddr) >>34) & 3) -#define SN2_NODE_OFFSET(addr) (((unsigned long)(addr)) & SN2_NODE_OFFSET_MASK) -#define SN2_KADDR(nasid, offset) (((unsigned long)(nasid)<<SN2_NODE_SHIFT) | (offset) | SN2_PAGE_OFFSET) -#define SN2_PAGE_OFFSET 0xe000003000000000UL /* Cacheable memory space */ - - -#define PLAT_MAX_NODE_NUMBER 2048 /* Maximum node number + 1 */ -#define PLAT_MAX_COMPACT_NODES 128 /* Maximum number of nodes in SSI system */ - -#define PLAT_MAX_PHYS_MEMORY (1UL << 49) - - - -/* - * On the SN platforms, a clump is the same as a memory bank. - */ -#define PLAT_CLUMPS_PER_NODE SN2_BANKS_PER_NODE -#define PLAT_CLUMP_OFFSET(addr) ((unsigned long)(addr) & 0x3ffffffffUL) -#define PLAT_CLUMPSIZE (SN2_NODE_SIZE/PLAT_CLUMPS_PER_NODE) -#define PLAT_MAXCLUMPS (PLAT_CLUMPS_PER_NODE * PLAT_MAX_COMPACT_NODES) - - - -/* - * PLAT_VALID_MEM_KADDR returns a boolean to indicate if a kaddr is potentially a - * valid cacheable identity mapped RAM memory address. - * Note that the RAM may or may not actually be present!! - */ -#define SN2_VALID_KERN_ADDR_MASK 0xffff003000000000UL -#define SN2_VALID_KERN_ADDR_VALUE 0xe000003000000000UL -#define PLAT_VALID_MEM_KADDR(kaddr) (((unsigned long)(kaddr) & SN2_VALID_KERN_ADDR_MASK) == SN2_VALID_KERN_ADDR_VALUE) - - - -/* - * Memory is conceptually divided into chunks. A chunk is either - * completely present, or else the kernel assumes it is completely - * absent. Each node consists of a number of possibly contiguous chunks. - */ -#define SN2_CHUNKSHIFT 25 /* 32 MB */ -#define PLAT_CHUNKSIZE (1UL << SN2_CHUNKSHIFT) -#define PLAT_CHUNKNUM(addr) ({unsigned long _p=(unsigned long)(addr); \ - (((_p&SN2_NODE_MASK)>>2) | \ - (_p&SN2_NODE_OFFSET_MASK)) >>SN2_CHUNKSHIFT;}) - -/* - * Given a kaddr, find the nid (compact nodeid) - */ -#ifdef CONFIG_IA64_SGI_SN_DEBUG -#define DISCONBUG(kaddr) panic("DISCONTIG BUG: line %d, %s. kaddr 0x%lx", \ - __LINE__, __FILE__, (long)(kaddr)) - -#define KVADDR_TO_NID(kaddr) ({long _ktn=(long)(kaddr); \ - kern_addr_valid(_ktn) ? \ - local_node_data->physical_node_map[SN2_NODE_NUMBER(_ktn)] : \ - (DISCONBUG(_ktn), 0UL);}) -#else -#define KVADDR_TO_NID(kaddr) (local_node_data->physical_node_map[SN2_NODE_NUMBER(kaddr)]) -#endif - - - -/* - * Given a kaddr, find the index into the clump_mem_map_base array of the page struct entry - * for the first page of the clump. - */ -#define PLAT_CLUMP_MEM_MAP_INDEX(kaddr) ({long _kmmi=(long)(kaddr); \ - KVADDR_TO_NID(_kmmi) * PLAT_CLUMPS_PER_NODE + \ - SN2_NODE_CLUMP_NUMBER(_kmmi);}) - - - -/* - * Calculate a "goal" value to be passed to __alloc_bootmem_node for allocating structures on - * nodes so that they don't alias to the same line in the cache as the previous allocated structure. - * This macro takes an address of the end of previous allocation, rounds it to a page boundary & - * changes the node number. - */ -#define PLAT_BOOTMEM_ALLOC_GOAL(cnode,kaddr) __pa(SN2_KADDR(PLAT_PXM_TO_PHYS_NODE_NUMBER(nid_to_pxm_map[cnode]), \ - (SN2_NODE_OFFSET(kaddr) + PAGE_SIZE - 1) >> PAGE_SHIFT << PAGE_SHIFT)) - - - - -/* - * Convert a proximity domain number (from the ACPI tables) into a physical node number. - * Note: on SN2, the promity domain number is the same as bits [8:1] of the NASID. The following - * algorithm relies on: - * - bit 0 of the NASID for cpu nodes is always 0 - * - bits [10:9] of all NASIDs in a partition are always the same - * - hard_smp_processor_id return the SAPIC of the current cpu & - * bits 0..11 contain the NASID. - * - * All of this complexity is because MS architectually limited proximity domain numbers to - * 8 bits. - */ - -#define PLAT_PXM_TO_PHYS_NODE_NUMBER(pxm) (((pxm)<<1) | (hard_smp_processor_id() & 0x300)) - -#endif /* _ASM_IA64_SN_MMZONE_SN2_H */ diff --git a/include/asm-ia64/sn/sn2/shub.h b/include/asm-ia64/sn/sn2/shub.h index 2c6719107c8391..4547ff440550f1 100644 --- a/include/asm-ia64/sn/sn2/shub.h +++ b/include/asm-ia64/sn/sn2/shub.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved. */ diff --git a/include/asm-ia64/sn/sn2/shub_md.h b/include/asm-ia64/sn/sn2/shub_md.h index 874b1c30a96089..2c4a7dc3b4f2b2 100644 --- a/include/asm-ia64/sn/sn2/shub_md.h +++ b/include/asm-ia64/sn/sn2/shub_md.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001, 2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001, 2002-2003 Silicon Graphics, Inc. All rights reserved. */ diff --git a/include/asm-ia64/sn/sn2/shub_mmr.h b/include/asm-ia64/sn/sn2/shub_mmr.h index 61aa480414d800..05ea7efaf453e3 100644 --- a/include/asm-ia64/sn/sn2/shub_mmr.h +++ b/include/asm-ia64/sn/sn2/shub_mmr.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved. */ @@ -25746,14 +25746,14 @@ /* Real-time Clock */ /* ==================================================================== */ -#define SH_RTC 0x00000001101c0000 -#define SH_RTC_MASK 0x007fffffffffffff +#define SH_RTC 0x00000001101c0000UL +#define SH_RTC_MASK 0x007fffffffffffffUL #define SH_RTC_INIT 0x0000000000000000 /* SH_RTC_REAL_TIME_CLOCK */ /* Description: Real-time Clock */ #define SH_RTC_REAL_TIME_CLOCK_SHFT 0 -#define SH_RTC_REAL_TIME_CLOCK_MASK 0x007fffffffffffff +#define SH_RTC_REAL_TIME_CLOCK_MASK 0x007fffffffffffffUL /* ==================================================================== */ /* Register "SH_SCRATCH0" */ diff --git a/include/asm-ia64/sn/sn2/shub_mmr_t.h b/include/asm-ia64/sn/sn2/shub_mmr_t.h index d2cef5e24a81aa..f0397c40075020 100644 --- a/include/asm-ia64/sn/sn2/shub_mmr_t.h +++ b/include/asm-ia64/sn/sn2/shub_mmr_t.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001-2003 Silicon Graphics, Inc. All rights reserved. */ diff --git a/include/asm-ia64/sn/sn2/shubio.h b/include/asm-ia64/sn/sn2/shubio.h index 51c33b67c9c7f9..19e7cfdb44b3cc 100644 --- a/include/asm-ia64/sn/sn2/shubio.h +++ b/include/asm-ia64/sn/sn2/shubio.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_SN2_SHUBIO_H @@ -3035,31 +3035,31 @@ typedef union ii_ippr_u { /* Scratch registers (all bits available) */ #define IIO_SCRATCH_REG0 IIO_ISCR0 #define IIO_SCRATCH_REG1 IIO_ISCR1 -#define IIO_SCRATCH_MASK 0xffffffffffffffff - -#define IIO_SCRATCH_BIT0_0 0x0000000000000001 -#define IIO_SCRATCH_BIT0_1 0x0000000000000002 -#define IIO_SCRATCH_BIT0_2 0x0000000000000004 -#define IIO_SCRATCH_BIT0_3 0x0000000000000008 -#define IIO_SCRATCH_BIT0_4 0x0000000000000010 -#define IIO_SCRATCH_BIT0_5 0x0000000000000020 -#define IIO_SCRATCH_BIT0_6 0x0000000000000040 -#define IIO_SCRATCH_BIT0_7 0x0000000000000080 -#define IIO_SCRATCH_BIT0_8 0x0000000000000100 -#define IIO_SCRATCH_BIT0_9 0x0000000000000200 -#define IIO_SCRATCH_BIT0_A 0x0000000000000400 - -#define IIO_SCRATCH_BIT1_0 0x0000000000000001 -#define IIO_SCRATCH_BIT1_1 0x0000000000000002 +#define IIO_SCRATCH_MASK 0xffffffffffffffffUL + +#define IIO_SCRATCH_BIT0_0 0x0000000000000001UL +#define IIO_SCRATCH_BIT0_1 0x0000000000000002UL +#define IIO_SCRATCH_BIT0_2 0x0000000000000004UL +#define IIO_SCRATCH_BIT0_3 0x0000000000000008UL +#define IIO_SCRATCH_BIT0_4 0x0000000000000010UL +#define IIO_SCRATCH_BIT0_5 0x0000000000000020UL +#define IIO_SCRATCH_BIT0_6 0x0000000000000040UL +#define IIO_SCRATCH_BIT0_7 0x0000000000000080UL +#define IIO_SCRATCH_BIT0_8 0x0000000000000100UL +#define IIO_SCRATCH_BIT0_9 0x0000000000000200UL +#define IIO_SCRATCH_BIT0_A 0x0000000000000400UL + +#define IIO_SCRATCH_BIT1_0 0x0000000000000001UL +#define IIO_SCRATCH_BIT1_1 0x0000000000000002UL /* IO Translation Table Entries */ #define IIO_NUM_ITTES 7 /* ITTEs numbered 0..6 */ /* Hw manuals number them 1..7! */ /* * IIO_IMEM Register fields. */ -#define IIO_IMEM_W0ESD 0x1 /* Widget 0 shut down due to error */ -#define IIO_IMEM_B0ESD (1 << 4) /* BTE 0 shut down due to error */ -#define IIO_IMEM_B1ESD (1 << 8) /* BTE 1 Shut down due to error */ +#define IIO_IMEM_W0ESD 0x1UL /* Widget 0 shut down due to error */ +#define IIO_IMEM_B0ESD (1UL << 4) /* BTE 0 shut down due to error */ +#define IIO_IMEM_B1ESD (1UL << 8) /* BTE 1 Shut down due to error */ /* * As a permanent workaround for a bug in the PI side of the shub, we've @@ -3191,23 +3191,23 @@ typedef union ii_ippr_u { /* * IO BTE Length/Status (IIO_IBLS) register bit field definitions */ -#define IBLS_BUSY (0x1 << 20) +#define IBLS_BUSY (0x1UL << 20) #define IBLS_ERROR_SHFT 16 -#define IBLS_ERROR (0x1 << IBLS_ERROR_SHFT) +#define IBLS_ERROR (0x1UL << IBLS_ERROR_SHFT) #define IBLS_LENGTH_MASK 0xffff /* * IO BTE Control/Terminate register (IBCT) register bit field definitions */ -#define IBCT_POISON (0x1 << 8) -#define IBCT_NOTIFY (0x1 << 4) -#define IBCT_ZFIL_MODE (0x1 << 0) +#define IBCT_POISON (0x1UL << 8) +#define IBCT_NOTIFY (0x1UL << 4) +#define IBCT_ZFIL_MODE (0x1UL << 0) /* * IIO Incoming Error Packet Header (IIO_IIEPH1/IIO_IIEPH2) */ -#define IIEPH1_VALID (1 << 44) -#define IIEPH1_OVERRUN (1 << 40) +#define IIEPH1_VALID (1UL << 44) +#define IIEPH1_OVERRUN (1UL << 40) #define IIEPH1_ERR_TYPE_SHFT 32 #define IIEPH1_ERR_TYPE_MASK 0xf #define IIEPH1_SOURCE_SHFT 20 @@ -3217,7 +3217,7 @@ typedef union ii_ippr_u { #define IIEPH1_CMD_SHFT 0 #define IIEPH1_CMD_MASK 7 -#define IIEPH2_TAIL (1 << 40) +#define IIEPH2_TAIL (1UL << 40) #define IIEPH2_ADDRESS_SHFT 0 #define IIEPH2_ADDRESS_MASK 38 @@ -3229,21 +3229,21 @@ typedef union ii_ippr_u { /* * IO Error Clear register bit field definitions */ -#define IECLR_PI1_FWD_INT (1 << 31) /* clear PI1_FORWARD_INT in iidsr */ -#define IECLR_PI0_FWD_INT (1 << 30) /* clear PI0_FORWARD_INT in iidsr */ -#define IECLR_SPUR_RD_HDR (1 << 29) /* clear valid bit in ixss reg */ -#define IECLR_BTE1 (1 << 18) /* clear bte error 1 */ -#define IECLR_BTE0 (1 << 17) /* clear bte error 0 */ -#define IECLR_CRAZY (1 << 16) /* clear crazy bit in wstat reg */ -#define IECLR_PRB_F (1 << 15) /* clear err bit in PRB_F reg */ -#define IECLR_PRB_E (1 << 14) /* clear err bit in PRB_E reg */ -#define IECLR_PRB_D (1 << 13) /* clear err bit in PRB_D reg */ -#define IECLR_PRB_C (1 << 12) /* clear err bit in PRB_C reg */ -#define IECLR_PRB_B (1 << 11) /* clear err bit in PRB_B reg */ -#define IECLR_PRB_A (1 << 10) /* clear err bit in PRB_A reg */ -#define IECLR_PRB_9 (1 << 9) /* clear err bit in PRB_9 reg */ -#define IECLR_PRB_8 (1 << 8) /* clear err bit in PRB_8 reg */ -#define IECLR_PRB_0 (1 << 0) /* clear err bit in PRB_0 reg */ +#define IECLR_PI1_FWD_INT (1UL << 31) /* clear PI1_FORWARD_INT in iidsr */ +#define IECLR_PI0_FWD_INT (1UL << 30) /* clear PI0_FORWARD_INT in iidsr */ +#define IECLR_SPUR_RD_HDR (1UL << 29) /* clear valid bit in ixss reg */ +#define IECLR_BTE1 (1UL << 18) /* clear bte error 1 */ +#define IECLR_BTE0 (1UL << 17) /* clear bte error 0 */ +#define IECLR_CRAZY (1UL << 16) /* clear crazy bit in wstat reg */ +#define IECLR_PRB_F (1UL << 15) /* clear err bit in PRB_F reg */ +#define IECLR_PRB_E (1UL << 14) /* clear err bit in PRB_E reg */ +#define IECLR_PRB_D (1UL << 13) /* clear err bit in PRB_D reg */ +#define IECLR_PRB_C (1UL << 12) /* clear err bit in PRB_C reg */ +#define IECLR_PRB_B (1UL << 11) /* clear err bit in PRB_B reg */ +#define IECLR_PRB_A (1UL << 10) /* clear err bit in PRB_A reg */ +#define IECLR_PRB_9 (1UL << 9) /* clear err bit in PRB_9 reg */ +#define IECLR_PRB_8 (1UL << 8) /* clear err bit in PRB_8 reg */ +#define IECLR_PRB_0 (1UL << 0) /* clear err bit in PRB_0 reg */ /* * IIO CRB control register Fields: IIO_ICCR @@ -3495,7 +3495,7 @@ typedef union iprte_a { typedef struct hub_piomap_s *hub_piomap_t; extern hub_piomap_t -hub_piomap_alloc(devfs_handle_t dev, /* set up mapping for this device */ +hub_piomap_alloc(vertex_hdl_t dev, /* set up mapping for this device */ device_desc_t dev_desc, /* device descriptor */ iopaddr_t xtalk_addr, /* map for this xtalk_addr range */ size_t byte_count, @@ -3513,7 +3513,7 @@ extern void hub_piomap_done(hub_piomap_t hub_piomap); extern caddr_t -hub_piotrans_addr( devfs_handle_t dev, /* translate to this device */ +hub_piotrans_addr( vertex_hdl_t dev, /* translate to this device */ device_desc_t dev_desc, /* device descriptor */ iopaddr_t xtalk_addr, /* Crosstalk address */ size_t byte_count, /* map this many bytes */ @@ -3523,7 +3523,7 @@ hub_piotrans_addr( devfs_handle_t dev, /* translate to this device */ typedef struct hub_dmamap_s *hub_dmamap_t; extern hub_dmamap_t -hub_dmamap_alloc( devfs_handle_t dev, /* set up mappings for dev */ +hub_dmamap_alloc( vertex_hdl_t dev, /* set up mappings for dev */ device_desc_t dev_desc, /* device descriptor */ size_t byte_count_max, /* max size of a mapping */ unsigned flags); /* defined in dma.h */ @@ -3545,14 +3545,14 @@ extern void hub_dmamap_done( hub_dmamap_t dmamap); /* done w/ mapping resources */ extern iopaddr_t -hub_dmatrans_addr( devfs_handle_t dev, /* translate for this device */ +hub_dmatrans_addr( vertex_hdl_t dev, /* translate for this device */ device_desc_t dev_desc, /* device descriptor */ paddr_t paddr, /* system physical address */ size_t byte_count, /* length */ unsigned flags); /* defined in dma.h */ extern alenlist_t -hub_dmatrans_list( devfs_handle_t dev, /* translate for this device */ +hub_dmatrans_list( vertex_hdl_t dev, /* translate for this device */ device_desc_t dev_desc, /* device descriptor */ alenlist_t palenlist, /* system addr/length list */ unsigned flags); /* defined in dma.h */ @@ -3561,12 +3561,12 @@ extern void hub_dmamap_drain( hub_dmamap_t map); extern void -hub_dmaaddr_drain( devfs_handle_t vhdl, +hub_dmaaddr_drain( vertex_hdl_t vhdl, paddr_t addr, size_t bytes); extern void -hub_dmalist_drain( devfs_handle_t vhdl, +hub_dmalist_drain( vertex_hdl_t vhdl, alenlist_t list); @@ -3574,14 +3574,14 @@ hub_dmalist_drain( devfs_handle_t vhdl, typedef struct hub_intr_s *hub_intr_t; extern hub_intr_t -hub_intr_alloc( devfs_handle_t dev, /* which device */ +hub_intr_alloc( vertex_hdl_t dev, /* which device */ device_desc_t dev_desc, /* device descriptor */ - devfs_handle_t owner_dev); /* owner of this interrupt */ + vertex_hdl_t owner_dev); /* owner of this interrupt */ extern hub_intr_t -hub_intr_alloc_nothd(devfs_handle_t dev, /* which device */ +hub_intr_alloc_nothd(vertex_hdl_t dev, /* which device */ device_desc_t dev_desc, /* device descriptor */ - devfs_handle_t owner_dev); /* owner of this interrupt */ + vertex_hdl_t owner_dev); /* owner of this interrupt */ extern void hub_intr_free(hub_intr_t intr_hdl); @@ -3596,16 +3596,14 @@ hub_intr_connect( hub_intr_t intr_hdl, /* xtalk intr resource hndl */ extern void hub_intr_disconnect(hub_intr_t intr_hdl); -extern devfs_handle_t -hub_intr_cpu_get(hub_intr_t intr_hdl); /* CONFIGURATION MANAGEMENT */ extern void -hub_provider_startup(devfs_handle_t hub); +hub_provider_startup(vertex_hdl_t hub); extern void -hub_provider_shutdown(devfs_handle_t hub); +hub_provider_shutdown(vertex_hdl_t hub); #define HUB_PIO_CONVEYOR 0x1 /* PIO in conveyor belt mode */ #define HUB_PIO_FIRE_N_FORGET 0x2 /* PIO in fire-and-forget mode */ @@ -3619,38 +3617,26 @@ hub_provider_shutdown(devfs_handle_t hub); typedef int hub_widget_flags_t; -/* Set the PIO mode for a widget. These two functions perform the - * same operation, but hub_device_flags_set() takes a hardware graph - * vertex while hub_widget_flags_set() takes a nasid and widget - * number. In most cases, hub_device_flags_set() should be used. - */ +/* Set the PIO mode for a widget. */ extern int hub_widget_flags_set(nasid_t nasid, xwidgetnum_t widget_num, hub_widget_flags_t flags); -/* Depending on the flags set take the appropriate actions */ -extern int hub_device_flags_set(devfs_handle_t widget_dev, - hub_widget_flags_t flags); - - /* Error Handling. */ -extern int hub_ioerror_handler(devfs_handle_t, int, int, struct io_error_s *); +extern int hub_ioerror_handler(vertex_hdl_t, int, int, struct io_error_s *); extern int kl_ioerror_handler(cnodeid_t, cnodeid_t, cpuid_t, int, paddr_t, caddr_t, ioerror_mode_t); -extern void hub_widget_reset(devfs_handle_t, xwidgetnum_t); -extern int hub_error_devenable(devfs_handle_t, int, int); -extern void hub_widgetdev_enable(devfs_handle_t, int); -extern void hub_widgetdev_shutdown(devfs_handle_t, int); -extern int hub_dma_enabled(devfs_handle_t); +extern int hub_error_devenable(vertex_hdl_t, int, int); +extern int hub_dma_enabled(vertex_hdl_t); /* hubdev */ extern void hubdev_init(void); -extern void hubdev_register(int (*attach_method)(devfs_handle_t)); -extern int hubdev_unregister(int (*attach_method)(devfs_handle_t)); -extern int hubdev_docallouts(devfs_handle_t hub); +extern void hubdev_register(int (*attach_method)(vertex_hdl_t)); +extern int hubdev_unregister(int (*attach_method)(vertex_hdl_t)); +extern int hubdev_docallouts(vertex_hdl_t hub); -extern caddr_t hubdev_prombase_get(devfs_handle_t hub); -extern cnodeid_t hubdev_cnodeid_get(devfs_handle_t hub); +extern caddr_t hubdev_prombase_get(vertex_hdl_t hub); +extern cnodeid_t hubdev_cnodeid_get(vertex_hdl_t hub); #endif /* __ASSEMBLY__ */ #endif /* _KERNEL */ diff --git a/include/asm-ia64/sn/sn2/slotnum.h b/include/asm-ia64/sn/sn2/slotnum.h index 3ebb4ba93a4404..03146d5e6cbd5e 100644 --- a/include/asm-ia64/sn/sn2/slotnum.h +++ b/include/asm-ia64/sn/sn2/slotnum.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 1992 - 1997,2001 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 1992-1997,2001-2003 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_SN2_SLOTNUM_H diff --git a/include/asm-ia64/sn/sn2/sn_private.h b/include/asm-ia64/sn/sn2/sn_private.h index 51baf4015dc865..5b553d81c79b8f 100644 --- a/include/asm-ia64/sn/sn2/sn_private.h +++ b/include/asm-ia64/sn/sn2/sn_private.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_SN2_SN_PRIVATE_H #define _ASM_IA64_SN_SN2_SN_PRIVATE_H @@ -49,13 +49,13 @@ extern void get_dir_ent(paddr_t paddr, int *state, #endif /* intr.c */ -extern int intr_reserve_level(cpuid_t cpu, int level, int err, devfs_handle_t owner_dev, char *name); +extern int intr_reserve_level(cpuid_t cpu, int level, int err, vertex_hdl_t owner_dev, char *name); extern void intr_unreserve_level(cpuid_t cpu, int level); extern int intr_connect_level(cpuid_t cpu, int bit, ilvl_t mask_no, intr_func_t intr_prefunc); extern int intr_disconnect_level(cpuid_t cpu, int bit); -extern cpuid_t intr_heuristic(devfs_handle_t dev, device_desc_t dev_desc, - int req_bit,int intr_resflags,devfs_handle_t owner_dev, +extern cpuid_t intr_heuristic(vertex_hdl_t dev, device_desc_t dev_desc, + int req_bit,int intr_resflags,vertex_hdl_t owner_dev, char *intr_name,int *resp_bit); extern void intr_block_bit(cpuid_t cpu, int bit); extern void intr_unblock_bit(cpuid_t cpu, int bit); @@ -83,8 +83,8 @@ void bte_lateinit(void); void bte_wait_for_xfer_completion(void *); /* klgraph.c */ -void klhwg_add_all_nodes(devfs_handle_t); -void klhwg_add_all_modules(devfs_handle_t); +void klhwg_add_all_nodes(vertex_hdl_t); +void klhwg_add_all_modules(vertex_hdl_t); /* klidbg.c */ void install_klidbg_functions(void); @@ -97,7 +97,6 @@ extern void setup_replication_mask(int maxnodes); /* init.c */ extern cnodeid_t get_compact_nodeid(void); /* get compact node id */ extern void init_platform_nodepda(nodepda_t *npda, cnodeid_t node); -extern void init_platform_pda(cpuid_t cpu); extern void per_cpu_init(void); extern int is_fine_dirmode(void); extern void update_node_information(cnodeid_t); @@ -125,7 +124,7 @@ extern __psunsigned_t debugger_stopped; */ struct hub_piomap_s { struct xtalk_piomap_s hpio_xtalk_info;/* standard crosstalk pio info */ - devfs_handle_t hpio_hub; /* which shub's mapping registers are set up */ + vertex_hdl_t hpio_hub; /* which shub's mapping registers are set up */ short hpio_holdcnt; /* count of current users of bigwin mapping */ char hpio_bigwin_num;/* if big window map, which one */ int hpio_flags; /* defined below */ @@ -146,7 +145,7 @@ struct hub_piomap_s { */ struct hub_dmamap_s { struct xtalk_dmamap_s hdma_xtalk_info;/* standard crosstalk dma info */ - devfs_handle_t hdma_hub; /* which shub we go through */ + vertex_hdl_t hdma_hub; /* which shub we go through */ int hdma_flags; /* defined below */ }; /* shub_dmamap flags */ @@ -214,7 +213,7 @@ typedef struct cpuinfo_s { (vhdl, INFO_LBL_CPU_INFO, (arbitrary_info_t)infoptr) /* Special initialization function for xswitch vertices created during startup. */ -extern void xswitch_vertex_init(devfs_handle_t xswitch); +extern void xswitch_vertex_init(vertex_hdl_t xswitch); extern xtalk_provider_t hub_provider; @@ -248,6 +247,6 @@ extern void crbx(nasid_t nasid, void (*pf)(char *, ...)); void bootstrap(void); /* sndrv.c */ -extern int sndrv_attach(devfs_handle_t vertex); +extern int sndrv_attach(vertex_hdl_t vertex); #endif /* _ASM_IA64_SN_SN2_SN_PRIVATE_H */ |