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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2020-08-11 12:56:36 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-09-20 14:35:04 +0100 |
| commit | 6e339478999bab6ae029a3b24fa79ddc698e1a4f (patch) | |
| tree | e451e8cee0b5f55cd5e54ed49e4b91b17c4f7f67 | |
| parent | c20f65b63202bcf2735dbf1e8085fa978b6104c5 (diff) | |
| download | openocd-jz4730-6e339478999bab6ae029a3b24fa79ddc698e1a4f.tar.gz | |
armv8-m: add SecureFault exception
Change-Id: I4e1963631e834b6334bc917e956c2db4464b7b08
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5797
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
| -rw-r--r-- | src/target/armv7m.c | 2 | ||||
| -rw-r--r-- | src/target/cortex_m.c | 8 | ||||
| -rw-r--r-- | src/target/cortex_m.h | 3 |
3 files changed, 12 insertions, 1 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 017d693ce..ea6ee6117 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -48,7 +48,7 @@ static const char * const armv7m_exception_strings[] = { "", "Reset", "NMI", "HardFault", - "MemManage", "BusFault", "UsageFault", "RESERVED", + "MemManage", "BusFault", "UsageFault", "SecureFault", "RESERVED", "RESERVED", "RESERVED", "SVCall", "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 5ea928a32..62e08468d 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -445,6 +445,14 @@ static int cortex_m_examine_exception_reason(struct target *target) if (retval != ERROR_OK) return retval; break; + case 7: /* Secure Fault */ + retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFSR, &except_sr); + if (retval != ERROR_OK) + return retval; + retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFAR, &except_ar); + if (retval != ERROR_OK) + return retval; + break; case 11: /* SVCall */ break; case 12: /* Debug Monitor */ diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index a767f93c5..794eda4c7 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -114,6 +114,7 @@ #define VC_MMERR BIT(4) #define VC_CORERESET BIT(0) +/* NVIC registers */ #define NVIC_ICTR 0xE000E004 #define NVIC_ISE0 0xE000E100 #define NVIC_ICSR 0xE000ED04 @@ -127,6 +128,8 @@ #define NVIC_DFSR 0xE000ED30 #define NVIC_MMFAR 0xE000ED34 #define NVIC_BFAR 0xE000ED38 +#define NVIC_SFSR 0xE000EDE4 +#define NVIC_SFAR 0xE000EDE8 /* NVIC_AIRCR bits */ #define AIRCR_VECTKEY (0x5FAul << 16) |