diff options
| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2019-02-12 11:07:49 +0900 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2019-03-22 20:50:38 +0900 |
| commit | 63ec9d6fc03d56928d71dc2f573da44718934422 (patch) | |
| tree | d1130faa3e70ba0641d1ae7b4f5fc01082931a05 | |
| parent | c922c328f1383099b600690844ed029c167e8520 (diff) | |
| download | renesas-bsp-63ec9d6fc03d56928d71dc2f573da44718934422.tar.gz | |
arm64: dts: r8a77990: Fix SCIF5 DMA channels
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the DMA channels support for SCIF5 is modified from 16..47
to 0..15 on R-Car E3.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77990.dtsi | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index bd4d71e2b93ef..ebd7fbbde65ed 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -2,7 +2,7 @@ /* * Device Tree Source for the R-Car E3 (R8A77990) SoC * - * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018-2019 Renesas Electronics Corp. */ #include <dt-bindings/clock/r8a77990-cpg-mssr.h> @@ -1083,9 +1083,8 @@ <&cpg CPG_CORE R8A77990_CLK_S3D1C>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; + dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; + dma-names = "tx", "rx"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 202>; status = "disabled"; |