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| author | Bjorn Helgaas <bhelgaas@google.com> | 2023-10-18 11:08:29 -0500 |
|---|---|---|
| committer | Martin Mares <mj@ucw.cz> | 2023-10-18 20:57:04 +0200 |
| commit | ba06b2f5bdd764a2534e1194acaf7dc3cf696c02 (patch) | |
| tree | 5ec427a47544af5ccfd6870cd9b036b42cdf4c9e | |
| parent | db43fb5e8f2c04c409bdd06ac2c2828685038d69 (diff) | |
| download | pciutils-ba06b2f5bdd764a2534e1194acaf7dc3cf696c02.tar.gz | |
lspci: Reorder PCIe DevCtl2 fields to match spec
Decode the PCIe DevCtl2 fields in the same order they're documented in the
PCIe spec.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| -rw-r--r-- | ls-caps.c | 11 |
1 files changed, 6 insertions, 5 deletions
@@ -1153,12 +1153,9 @@ static void cap_express_dev2(struct device *d, int where, int type) } w = get_conf_word(d, where + PCI_EXP_DEVCTL2); - printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c 10BitTagReq%c OBFF %s,", + printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c", cap_express_dev2_timeout_value(PCI_EXP_DEVCTL2_TIMEOUT_VALUE(w)), - FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS), - FLAG(w, PCI_EXP_DEVCTL2_LTR), - FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ), - cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w))); + FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS)); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEVCTL2_ARI)); else @@ -1176,6 +1173,10 @@ static void cap_express_dev2(struct device *d, int where, int type) printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK)); printf("\n"); } + printf("\t\t\t LTR%c 10BitTagReq%c OBFF %s\n", + FLAG(w, PCI_EXP_DEVCTL2_LTR), + FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ), + cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w))); } static const char *cap_express_link2_speed_cap(int vector) |