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author | Mateusz Nowicki <mateusz.nowicki@solidigm.com> | 2023-09-01 15:41:59 +0200 |
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committer | Mateusz Nowicki <mateusz.nowicki@solidigm.com> | 2023-09-01 15:41:59 +0200 |
commit | db43fb5e8f2c04c409bdd06ac2c2828685038d69 (patch) | |
tree | 958b407af7af8d2bb66fee3e6b076351e9ecb751 | |
parent | 7ec58f1c9dc011f334863e07917e349d95748d51 (diff) | |
download | pciutils-db43fb5e8f2c04c409bdd06ac2c2828685038d69.tar.gz |
Add support for 32.0 GT/s header
-rw-r--r-- | lib/header.h | 1 | ||||
-rw-r--r-- | ls-ecaps.c | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/lib/header.h b/lib/header.h index 5ab606f..57ef0ae 100644 --- a/lib/header.h +++ b/lib/header.h @@ -254,6 +254,7 @@ #define PCI_EXT_CAP_ID_LMR 0x27 /* Lane Margining at Receiver */ #define PCI_EXT_CAP_ID_HIER_ID 0x28 /* Hierarchy ID */ #define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ +#define PCI_EXT_CAP_ID_32GT 0x2a /* Physical Layer 32.0 GT/s */ #define PCI_EXT_CAP_ID_DOE 0x2e /* Data Object Exchange */ /*** Definitions of capabilities ***/ @@ -1556,6 +1556,9 @@ show_ext_caps(struct device *d, int type) case PCI_EXT_CAP_ID_NPEM: printf("Native PCIe Enclosure Management <?>\n"); break; + case PCI_EXT_CAP_ID_32GT: + printf("Physical Layer 32.0 GT/s <?>\n"); + break; case PCI_EXT_CAP_ID_DOE: cap_doe(d, where); break; |