Age | Commit message (Expand) | Author | Files | Lines |
2014-11-04 | target-ppc: Fix an invalid free in opcode table handling code. | Bharata B Rao | 1 | -3/+16 |
2014-11-04 | target-ppc: Use macros in opcodes table handling code | Bharata B Rao | 1 | -10/+14 |
2014-11-04 | target-ppc : Add new processor type 440x5wDFPU | Pierre Mallard | 1 | -0/+38 |
2014-11-04 | target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 | Pierre Mallard | 1 | -3/+6 |
2014-11-04 | target-ppc: Implement IVOR[59] By Default for Book E | Tom Musta | 1 | -1/+1 |
2014-11-04 | target-ppc: Fix kvmppc_set_compat to use negotiated cpu-version | Alexey Kardashevskiy | 1 | -1/+1 |
2014-10-15 | qdev: Drop legacy_name from qdev properties | Gonglei | 1 | -1/+0 |
2014-10-15 | qdev: Add description field in PropertyInfo struct | Gonglei | 1 | -0/+1 |
2014-09-25 | target-ppc: Use cpu_exec_interrupt qom hook | Richard Henderson | 1 | -0/+1 |
2014-09-25 | target-ppc: Use cpu_exec_enter qom hook | Richard Henderson | 1 | -0/+9 |
2014-07-15 | target-ppc: Fix number of threads per core limit | Alexey Kardashevskiy | 1 | -13/+5 |
2014-07-08 | target-ppc: Remove POWER7+ and POWER8E families | Alexey Kardashevskiy | 1 | -71/+2 |
2014-07-08 | target-ppc: Add pvr_match() callback | Alexey Kardashevskiy | 1 | -14/+35 |
2014-07-08 | target-ppc: Change default cpu for ppc64le-linux-user | Richard Henderson | 1 | -0/+4 |
2014-06-29 | target-ppc: enable virtio endian ambivalent support | Greg Kurz | 1 | -0/+15 |
2014-06-27 | target-ppc: Add support for POWER8 pvr 0x4D0000 | Alexey Kardashevskiy | 1 | -4/+16 |
2014-06-27 | PPC: Add support for Apple gdb in gdbstub | Alexander Graf | 1 | -0/+8 |
2014-06-16 | target-ppc: Enable DABRX SPR and limit it to <=POWER7 | Alexey Kardashevskiy | 1 | -1/+14 |
2014-06-16 | target-ppc: Enable PPR and VRSAVE SPRs migration | Alexey Kardashevskiy | 1 | -8/+8 |
2014-06-16 | target-ppc: Add POWER8's Event Based Branch (EBB) control SPRs | Alexey Kardashevskiy | 1 | -0/+57 |
2014-06-16 | target-ppc: Add POWER8's TM SPRs | Alexey Kardashevskiy | 1 | -0/+88 |
2014-06-16 | target-ppc: Add POWER8's MMCR2/MMCRS SPRs | Alexey Kardashevskiy | 1 | -0/+22 |
2014-06-16 | target-ppc: Enable FSCR facility check for TAR | Alexey Kardashevskiy | 1 | -2/+34 |
2014-06-16 | target-ppc: Add POWER8's FSCR SPR | Alexey Kardashevskiy | 1 | -0/+10 |
2014-06-16 | target-ppc: Add POWER8's TIR SPR | Alexey Kardashevskiy | 1 | -0/+10 |
2014-06-16 | target-ppc: Refactor class init for POWER7/8 | Alexey Kardashevskiy | 1 | -39/+61 |
2014-06-16 | target-ppc: Switch POWER7/8 classes to use correct PMU SPRs | Alexey Kardashevskiy | 1 | -15/+2 |
2014-06-16 | target-ppc: Make use of gen_spr_power5p_lpar() for POWER7/8 | Alexey Kardashevskiy | 1 | -5/+1 |
2014-06-16 | target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8 | Alexey Kardashevskiy | 1 | -7/+1 |
2014-06-16 | target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers | Alexey Kardashevskiy | 1 | -30/+40 |
2014-06-16 | target-ppc: Move POWER8 TCE Address control (TAR) to a helper | Alexey Kardashevskiy | 1 | -5/+9 |
2014-06-16 | target-ppc: Move POWER7/8 PIR/PURR/SPURR SPR registration to helpers | Alexey Kardashevskiy | 1 | -14/+26 |
2014-06-16 | target-ppc: Enable PMU SPRs migration | Alexey Kardashevskiy | 1 | -52/+52 |
2014-06-16 | target-ppc: Remove check_pow_970FX | Alexey Kardashevskiy | 1 | -9/+1 |
2014-06-16 | target-ppc: Introduce and reuse generalized init_proc_book3s_64() | Alexey Kardashevskiy | 1 | -58/+27 |
2014-06-16 | target-ppc: Add HID4 SPR for PPC970 | Alexey Kardashevskiy | 1 | -0/+11 |
2014-06-16 | target-ppc: Add PMC7/8 to 970 class | Alexey Kardashevskiy | 1 | -0/+26 |
2014-06-16 | target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family | Alexey Kardashevskiy | 1 | -0/+32 |
2014-06-16 | target-ppc: Add "POWER" prefix to MMCRA PMU registers | Alexey Kardashevskiy | 1 | -1/+1 |
2014-06-16 | target-ppc: Copy and split gen_spr_7xx() for 970 | Alexey Kardashevskiy | 1 | -1/+105 |
2014-06-16 | target-ppc: Make UCTRL a mirror of CTRL | Alexey Kardashevskiy | 1 | -2/+2 |
2014-06-16 | target-ppc: Refactor PPC970 | Alexey Kardashevskiy | 1 | -13/+32 |
2014-06-16 | target-ppc: Merge 970FX and 970MP into a single 970 class | Alexey Kardashevskiy | 1 | -198/+8 |
2014-06-16 | target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs | Alexey Kardashevskiy | 1 | -49/+49 |
2014-06-16 | target-ppc: Support VSX in PPC User Mode | Tom Musta | 1 | -0/+1 |
2014-06-16 | target-ppc: Allow little-endian user mode. | Doug Kwan | 1 | -0/+3 |
2014-06-16 | PPC: e500: Fix MMUCSR0 emulation | Alex Zuepke | 1 | -3/+1 |
2014-06-16 | KVM: PPC: Enable compatibility mode | Alexey Kardashevskiy | 1 | -0/+5 |
2014-06-16 | spapr: Limit threads per core according to current compatibility mode | Alexey Kardashevskiy | 1 | -0/+27 |
2014-06-16 | target-ppc: Define Processor Compatibility Masks | Alexey Kardashevskiy | 1 | -0/+3 |
2014-06-16 | target-ppc: Implement "compat" CPU option | Alexey Kardashevskiy | 1 | -0/+34 |
2014-06-16 | target-ppc: Add "compat" CPU option | Alexey Kardashevskiy | 1 | -0/+75 |
2014-06-16 | target-ppc: Introduce callback for interrupt endianness | Greg Kurz | 1 | -0/+16 |
2014-06-16 | PPC: Properly emulate L1CSR0 and L1CSR1 | Alexander Graf | 1 | -3/+11 |
2014-06-16 | PPC: Add L1CFG1 SPR emulation | Alexander Graf | 1 | -1/+7 |
2014-06-16 | PPC: Fix SPR access control of L1CFG0 | Alexander Graf | 1 | -4/+4 |
2014-06-16 | target-ppc: Eliminate Magic Number MSR Masks | Tom Musta | 1 | -54/+776 |
2014-06-16 | target-ppc: Move alias lookup after class lookup | Alexey Kardashevskiy | 1 | -7/+11 |
2014-04-08 | PPC: Add l1 cache sizes for 970 and above systems | Alexander Graf | 1 | -0/+8 |
2014-03-27 | target-ppc: MSR_POW not supported on POWER7/7+/8 | Anton Blanchard | 1 | -3/+3 |
2014-03-27 | target-ppc: POWER7+ supports the MSR_VSX bit | Anton Blanchard | 1 | -1/+1 |
2014-03-27 | target-ppc: POWER8 supports isel | Anton Blanchard | 1 | -1/+1 |
2014-03-27 | target-ppc: POWER8 supports the MSR_LE bit | Anton Blanchard | 1 | -1/+1 |
2014-03-20 | target-ppc: Introduce powerisa-207-server flag | Alexey Kardashevskiy | 1 | -1/+2 |
2014-03-20 | target-ppc: Force CPU threads count to be a power of 2 | Bharata B Rao | 1 | -0/+6 |
2014-03-20 | target-ppc: Fix overallocation of opcode tables | Stuart Brady | 1 | -1/+1 |
2014-03-20 | target-ppc: Reset SPRs on CPU reset | Alexey Kardashevskiy | 1 | -1/+11 |
2014-03-13 | cputlb: Change tlb_flush() argument to CPUState | Andreas Färber | 1 | -1/+1 |
2014-03-13 | exec: Change cpu_abort() argument to CPUState | Andreas Färber | 1 | -2/+3 |
2014-03-13 | cpu: Move exception_index field from CPU_COMMON to CPUState | Andreas Färber | 1 | -1/+1 |
2014-03-13 | cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook | Andreas Färber | 1 | -1/+3 |
2014-03-13 | cpu: Factor out cpu_generic_init() | Andreas Färber | 1 | -20/+1 |
2014-03-13 | cpu: Turn cpu_has_work() into a CPUClass hook | Andreas Färber | 1 | -0/+9 |
2014-03-05 | target-ppc: spapr: e500: fix to use cpu_dt_id | Alexey Kardashevskiy | 1 | -0/+1 |
2014-03-05 | target-ppc: add PowerPCCPU::cpu_dt_id | Alexey Kardashevskiy | 1 | -6/+4 |
2014-03-05 | target-ppc: Altivec 2.07: Add Instruction Flag | Tom Musta | 1 | -1/+1 |
2014-03-05 | target-ppc: Load Quadword | Tom Musta | 1 | -1/+1 |
2014-03-05 | target-ppc: Add Flag for ISA 2.07 Load/Store Quadword Instructions | Tom Musta | 1 | -1/+2 |
2014-03-05 | target-ppc: Add Target Address SPR (TAR) to Power8 | Tom Musta | 1 | -1/+13 |
2014-03-05 | target-ppc: Add Flag for bctar | Tom Musta | 1 | -1/+1 |
2014-03-05 | target-ppc: Enable frsqrtes on Power7 and Power8 | Tom Musta | 1 | -0/+3 |
2014-03-05 | target-ppc: Add Flag for Power ISA V2.06 Floating Point Test Instructions | Tom Musta | 1 | -3/+6 |
2014-03-05 | target-ppc: Fix and enable fri[mnpz] | Tom Musta | 1 | -0/+3 |
2014-03-05 | target-ppc: Add Flag for ISA V2.06 Floating Point Conversion | Tom Musta | 1 | -3/+3 |
2014-03-05 | target-ppc: Add Flag for ISA2.06 Atomic Instructions | Tom Musta | 1 | -3/+6 |
2014-03-05 | target-ppc: Add Flag for ISA2.06 Divide Extended Instructions | Tom Musta | 1 | -3/+3 |
2014-03-05 | target-ppc: Add ISA2.06 bpermd Instruction | Tom Musta | 1 | -4/+7 |
2014-03-05 | target-ppc: VSX Stage 4: Add VSX 2.07 Flag | Tom Musta | 1 | -1/+1 |
2014-03-05 | target-ppc: disable unsupported modes for SPR_CTRL/SPR_UCTRL | Alexey Kardashevskiy | 1 | -6/+6 |
2014-03-05 | PPC: KVM: add support for LPCR | Greg Kurz | 1 | -1/+15 |
2014-03-05 | PPC: KVM: fix "set one register" | Alexey Kardashevskiy | 1 | -0/+3 |
2014-03-05 | target-ppc: fix Authority Mask Register init value | Alexey Kardashevskiy | 1 | -1/+1 |
2014-03-05 | target-ppc: remove unsupported SPRs from 970 and P5+ | Alexey Kardashevskiy | 1 | -39/+0 |
2014-03-05 | target-ppc: remove embedded MMU SPRs from 970, P5+/7/7+/8 | Alexey Kardashevskiy | 1 | -46/+0 |
2014-03-05 | target-ppc: remove powerpc 970gx | Alexey Kardashevskiy | 1 | -100/+0 |
2014-03-05 | target-ppc: fix LPCR SPR number | Alexey Kardashevskiy | 1 | -1/+1 |
2014-03-05 | target-ppc: fix compile error when PPC_DUMP_CPU is enabled | Alexey Kardashevskiy | 1 | -2/+3 |
2014-02-13 | target-ppc: Make ppc40x CPUs available in ppcemb | Andreas Färber | 1 | -19/+19 |
2013-12-20 | target-ppc: move POWER7+ to a separate family | Alexey Kardashevskiy | 1 | -0/+38 |
2013-12-20 | Add MSR VSX and Associated Exception | Tom Musta | 1 | -2/+3 |
2013-12-20 | Declare and Enable VSX | Tom Musta | 1 | -2/+4 |
2013-12-20 | powerpc: add PVR mask support | Alexey Kardashevskiy | 1 | -0/+44 |
2013-10-25 | spapr: Use DeviceClass::fw_name for device tree CPU node | Andreas Färber | 1 | -0/+2 |
2013-10-25 | target-ppc: Fill in OpenFirmware names for some PowerPCCPU families | Andreas Färber | 1 | -0/+3 |
2013-10-25 | target-ppc: dump-guest-memory support | Aneesh Kumar K.V | 1 | -0/+4 |
2013-10-25 | PPC: Fix L2CR write accesses | Alexander Graf | 1 | -12/+17 |
2013-10-07 | cpu: Drop cpu_model_str from CPU_COMMON | Andreas Färber | 1 | -3/+0 |
2013-09-02 | target-ppc: POWER7 supports the MSR_LE bit | Anton Blanchard | 1 | -1/+1 |
2013-08-20 | Convert stderr message calling error_get_pretty() to error_report() | Seiji Aguchi | 1 | -1/+2 |
2013-08-07 | target-ppc: Prepare POWER5P CPU family | Andreas Färber | 1 | -0/+104 |
2013-07-30 | target-ppc: Suppress TCG instruction emulation warnings for qtest | Andreas Färber | 1 | -1/+1 |
2013-07-29 | Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging | Anthony Liguori | 1 | -0/+2 |
2013-07-29 | target-ppc: Convert ppc cpu savevm to VMStateDescription | Alexey Kardashevskiy | 1 | -0/+1 |
2013-07-29 | cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" | Andreas Färber | 1 | -0/+2 |
2013-07-27 | cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML | Andreas Färber | 1 | -0/+5 |
2013-07-27 | cpu: Introduce CPUClass::gdb_{read,write}_register() | Andreas Färber | 1 | -0/+2 |
2013-07-26 | cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs | Andreas Färber | 1 | -0/+2 |
2013-07-23 | gdbstub: Change gdb_register_coprocessor() argument to CPUState | Andreas Färber | 1 | -7/+8 |
2013-07-23 | cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook | Andreas Färber | 1 | -0/+3 |
2013-07-23 | cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc() | Andreas Färber | 1 | -0/+8 |
2013-07-11 | target-ppc: Add POWER8 v1.0 CPU model | Prerna Saxena | 1 | -0/+34 |
2013-07-11 | e600 core for MPC86xx processors | Julio Guerra | 1 | -0/+125 |
2013-07-09 | cpu: Move reset logging to CPUState | Andreas Färber | 1 | -5/+0 |
2013-07-09 | log: Change log_cpu_state[_mask]() argument to CPUState | Andreas Färber | 1 | -1/+1 |
2013-07-01 | PPC: Ignore writes to L2CR | Alexander Graf | 1 | -11/+11 |
2013-07-01 | PPC: Introduce an alias cache for faster lookups | Alexander Graf | 1 | -5/+27 |
2013-07-01 | target-ppc: Introduce unrealizefn for PowerPCCPU | Andreas Färber | 1 | -1/+15 |
2013-07-01 | ppc: do not register IABR SPR twice for 603e | Hervé Poussineau | 1 | -5/+0 |
2013-07-01 | target-ppc: Drop redundant flags assignments from CPU families | Andreas Färber | 1 | -45/+0 |
2013-06-28 | cpu: Change qemu_init_vcpu() argument to CPUState | Andreas Färber | 1 | -2/+0 |
2013-06-28 | cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks | Andreas Färber | 1 | -0/+2 |
2013-05-06 | target-ppc: Add read and write of PPR SPR | Anton Blanchard | 1 | -0/+4 |
2013-04-26 | target-ppc: add instruction flags for Book I 2.05 | Aurelien Jarno | 1 | -1/+1 |
2013-04-26 | target-ppc: Add more stubs for POWER7 PMU registers | David Gibson | 1 | -0/+12 |
2013-04-26 | pseries: Fixes and enhancements to L1 cache properties | David Gibson | 1 | -0/+3 |
2013-04-26 | PPC: Add breakpoint registers for 603 and e300 | Fabien Chouteau | 1 | -0/+34 |
2013-04-26 | PPC: fix hreset_vector for 60x, 7x0, 7x5, G2, MPC8xx, MPC5xx, 7400 and 7450 | Fabien Chouteau | 1 | -11/+11 |
2013-04-26 | PPC: Remove env->hreset_excp_prefix | Fabien Chouteau | 1 | -30/+12 |
2013-04-26 | target-ppc: Enable ISEL on POWER7 | Aurelien Jarno | 1 | -1/+1 |
2013-03-22 | target-ppc: Use QOM method dispatch for MMU fault handling | David Gibson | 1 | -1/+53 |
2013-03-22 | mmu-hash64: Implement Virtual Page Class Key Protection | David Gibson | 1 | -0/+49 |
2013-03-22 | target-ppc: Remove vestigial PowerPC 620 support | David Gibson | 1 | -255/+0 |
2013-03-22 | PPC/GDB: handle read and write of fpscr | Fabien Chouteau | 1 | -1/+1 |
2013-03-12 | cpu: Replace do_interrupt() by CPUClass::do_interrupt method | Andreas Färber | 1 | -0/+1 |
2013-03-08 | target-ppc: Move CPU aliases out of translate_init.c | Andreas Färber | 1 | -198/+3 |
2013-03-08 | target-ppc: Report CPU aliases for QMP | Andreas Färber | 1 | -0/+21 |
2013-03-08 | target-ppc: List alias names alongside CPU models | Andreas Färber | 1 | -12/+11 |
2013-03-08 | target-ppc: Make host CPU a subclass of the host's CPU model | Andreas Färber | 1 | -7/+8 |
2013-03-08 | target-ppc: Fix PPC_DUMP_SPR_ACCESS build | Andreas Färber | 1 | -2/+2 |
2013-03-08 | target-ppc: Add mechanism for synchronizing SPRs with KVM | David Gibson | 1 | -49/+65 |
2013-03-08 | target-ppc: Change "POWER7" CPU alias | Andreas Färber | 1 | -1/+1 |
2013-03-08 | target-ppc: Split model definitions out of translate_init.c | Andreas Färber | 1 | -1905/+2 |
2013-03-08 | target-ppc: Update Coding Style for CPU models | Andreas Färber | 1 | -100/+100 |
2013-03-08 | target-ppc: Turn descriptive CPU model comments into device descriptions | Andreas Färber | 1 | -860/+754 |
2013-03-08 | target-ppc: Turn descriptive CPU family comments into device descriptions | Andreas Färber | 1 | -52/+107 |
2013-03-08 | target-ppc: Set remaining fields on CPU family classes | Andreas Färber | 1 | -430/+375 |
2013-03-08 | target-ppc: Register all types for TARGET_PPCEMB | Andreas Färber | 1 | -9/+34 |
2013-03-08 | target-ppc: Set instruction flags on CPU family classes | Andreas Färber | 1 | -495/+499 |
2013-03-08 | target-ppc: Introduce abstract CPU family types | Andreas Färber | 1 | -69/+432 |
2013-03-08 | target-ppc: Convert CPU definitions | Andreas Färber | 1 | -83/+80 |
2013-03-08 | target-ppc: Get model name from type name | Andreas Färber | 1 | -3/+10 |
2013-03-08 | target-ppc: Extract POWER7 alias | Andreas Färber | 1 | -2/+1 |
2013-03-08 | target-ppc: Extract 970 aliases | Andreas Färber | 1 | -6/+2 |
2013-03-08 | target-ppc: Extract 405GPe alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract MPC8240 alias | Andreas Färber | 1 | -5/+3 |
2013-03-08 | target-ppc: Extract MPC5200/MPC5200B aliases | Andreas Färber | 1 | -10/+2 |
2013-03-08 | target-ppc: Extract MPC52xx alias | Andreas Färber | 1 | -5/+2 |
2013-03-08 | target-ppc: Extract MPC82xx_HiP{3, 4} aliases | Andreas Färber | 1 | -42/+14 |
2013-03-08 | target-ppc: Extract MPC82xx aliases to *_HiP4 | Andreas Färber | 1 | -18/+6 |
2013-03-08 | target-ppc: Extract MPC8247/MPC8248/MPC8270-80 aliases | Andreas Färber | 1 | -21/+7 |
2013-03-08 | target-ppc: Extract MPC82xx alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract e200 alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract e300 alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract MPC83xx aliases | Andreas Färber | 1 | -16/+4 |
2013-03-08 | target-ppc: Extract e500v1/e500v2 aliases | Andreas Färber | 1 | -6/+2 |
2013-03-08 | target-ppc: Extract MPC85xx aliases | Andreas Färber | 1 | -85/+17 |
2013-03-08 | target-ppc: Extract 604e alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 601/601v aliases | Andreas Färber | 1 | -6/+2 |
2013-03-08 | target-ppc: Extract 603r alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 603e alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 740/750 aliases | Andreas Färber | 1 | -5/+2 |
2013-03-08 | target-ppc: Extract 750 aliases | Andreas Färber | 1 | -18/+6 |
2013-03-08 | target-ppc: Extract 7x5 aliases | Andreas Färber | 1 | -5/+2 |
2013-03-08 | target-ppc: Extract 7400 alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 7410 alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 7448 alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 7450 alias | Andreas Färber | 1 | -3/+1 |
2013-03-08 | target-ppc: Extract 74x1 aliases | Andreas Färber | 1 | -5/+2 |
2013-03-08 | target-ppc: Extract 74x5 as aliases | Andreas Färber | 1 | -5/+2 |
2013-03-08 | target-ppc: Extract 74x7[A] aliases | Andreas Färber | 1 | -10/+4 |
2013-03-08 | target-ppc: Turn "ppc32" and "ppc64" CPUs into aliases | Andreas Färber | 1 | -31/+5 |
2013-03-08 | target-ppc: Extract 440 aliases | Andreas Färber | 1 | -18/+5 |
2013-03-08 | target-ppc: Extract 40x aliases | Andreas Färber | 1 | -18/+7 |
2013-03-08 | target-ppc: Extract MGT823/MPC8xx as aliases | Andreas Färber | 1 | -76/+17 |
2013-03-08 | target-ppc: Extract MPC5xx aliases | Andreas Färber | 1 | -66/+15 |
2013-03-08 | target-ppc: Make -cpu "ppc" an alias to "ppc32" | Andreas Färber | 1 | -28/+1 |
2013-03-08 | target-ppc: Extract aliases from definitions list | Andreas Färber | 1 | -73/+72 |
2013-03-08 | target-ppc: Inline comma into POWERPC_DEF_SVR() macro | Andreas Färber | 1 | -603/+603 |
2013-03-08 | target-ppc: Drop nested TARGET_PPC64 guard for POWER7 | Andreas Färber | 1 | -2/+0 |
2013-03-08 | target-ppc: Update error handling in ppc_cpu_realize() | Andreas Färber | 1 | -3/+3 |