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| author | Nadav Amit <namit@vmware.com> | 2020-06-19 12:39:09 -0700 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-06-29 11:27:23 -0400 |
| commit | a4ff5dcebf2f666aeff4d67d3a1fcffa076e736c (patch) | |
| tree | b27832a078ffdc9c6b7489afe7a42b98b4672221 | |
| parent | d7903be60ba61792d7edb69126e82629ab43e60d (diff) | |
| download | kvm-unit-tests-a4ff5dcebf2f666aeff4d67d3a1fcffa076e736c.tar.gz | |
x86: pmu: fix failures on 32-bit due to wrong masks
Some mask computation are using long constants instead of long long
constants, which causes test failures on x86-32.
Signed-off-by: Nadav Amit <namit@vmware.com>
Message-Id: <20200619193909.18949-1-namit@vmware.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | x86/pmu.c | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -324,11 +324,11 @@ static void check_counter_overflow(void) cnt.count = 1 - count; if (gp_counter_base == MSR_IA32_PMC0) - cnt.count &= (1ul << eax.split.bit_width) - 1; + cnt.count &= (1ull << eax.split.bit_width) - 1; if (i == num_counters) { cnt.ctr = fixed_events[0].unit_sel; - cnt.count &= (1ul << edx.split.bit_width_fixed) - 1; + cnt.count &= (1ull << edx.split.bit_width_fixed) - 1; } if (i % 2) @@ -456,7 +456,7 @@ static void check_running_counter_wrmsr(void) count = -1; if (gp_counter_base == MSR_IA32_PMC0) - count &= (1ul << eax.split.bit_width) - 1; + count &= (1ull << eax.split.bit_width) - 1; wrmsr(gp_counter_base, count); @@ -488,7 +488,7 @@ static void check_gp_counters_write_width(void) { u64 val_64 = 0xffffff0123456789ull; u64 val_32 = val_64 & ((1ull << 32) - 1); - u64 val_max_width = val_64 & ((1ul << eax.split.bit_width) - 1); + u64 val_max_width = val_64 & ((1ull << eax.split.bit_width) - 1); int i; /* |