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authorWangyan Wang <wangyan.wang@mediatek.com>2019-04-09 14:53:04 +0800
committerCK Hu <ck.hu@mediatek.com>2019-04-09 17:15:40 +0800
commit0c24613cda163dedfa229afc8eff6072e57fac8d (patch)
treeea80a1aa799e7e776af07793f33d3a2f443e9952
parent2ae2c3316fb77dcf64275d011596b60104c45426 (diff)
downloadfscrypt-0c24613cda163dedfa229afc8eff6072e57fac8d.tar.gz
drm/mediatek: fix the rate and divder of hdmi phy for MT2701
Due to a clerical error,there is one zero less for 12800000. Fix it for 128000000 Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623") Signed-off-by: Wangyan Wang <wangyan.wang@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
-rw-r--r--drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
index fcc42dc6ea7fb..0746fc8877069 100644
--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
@@ -116,8 +116,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
if (rate <= 64000000)
pos_div = 3;
- else if (rate <= 12800000)
- pos_div = 1;
+ else if (rate <= 128000000)
+ pos_div = 2;
else
pos_div = 1;