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authorPalmer Dabbelt <palmer@rivosinc.com>2024-03-14 09:24:37 -0700
committerPalmer Dabbelt <palmer@rivosinc.com>2024-03-20 08:56:13 -0700
commiteeb7a8933e71f98354536c3d849a26978539b09f (patch)
treeed86e64f3f0630cfaad02a360fe731f80e8f1889 /arch/riscv/include/asm/mmiowb.h
parent2b2ca354674bed0d0222ce1426d2d45b065ac1e8 (diff)
parentcd6c916ccf21bb4c16367493541192e0f3a19278 (diff)
downloadlinux-eeb7a8933e71f98354536c3d849a26978539b09f.tar.gz
Merge patch series "riscv: mm: Extend mappable memory up to hint address"
Charlie Jenkins <charlie@rivosinc.com> says: On riscv, mmap currently returns an address from the largest address space that can fit entirely inside of the hint address. This makes it such that the hint address is almost never returned. This patch raises the mappable area up to and including the hint address. This allows mmap to often return the hint address, which allows a performance improvement over searching for a valid address as well as making the behavior more similar to other architectures. Note that a previous patch introduced stronger semantics compared to other architectures for riscv mmap. On riscv, mmap will not use bits in the upper bits of the virtual address depending on the hint address. On other architectures, a random address is returned in the address space requested. On all architectures the hint address will be returned if it is available. This allows riscv applications to configure how many bits in the virtual address should be left empty. This has the two benefits of being able to request address spaces that are smaller than the default and doesn't require the application to know the page table layout of riscv. * b4-shazam-merge: docs: riscv: Define behavior of mmap selftests: riscv: Generalize mm selftests riscv: mm: Use hint address in mmap if available Link: https://lore.kernel.org/r/20240130-use_mmap_hint_address-v3-0-8a655cfa8bcb@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/asm/mmiowb.h')
-rw-r--r--arch/riscv/include/asm/mmiowb.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/mmiowb.h b/arch/riscv/include/asm/mmiowb.h
index 0b2333e71fdc5d..52ce4a399d9b2b 100644
--- a/arch/riscv/include/asm/mmiowb.h
+++ b/arch/riscv/include/asm/mmiowb.h
@@ -7,7 +7,7 @@
* "o,w" is sufficient to ensure that all writes to the device have completed
* before the write to the spinlock is allowed to commit.
*/
-#define mmiowb() __asm__ __volatile__ ("fence o,w" : : : "memory");
+#define mmiowb() RISCV_FENCE(o, w)
#include <linux/smp.h>
#include <asm-generic/mmiowb.h>