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authorJiang Liu <jiang.liu@linux.intel.com>2014-11-28 21:43:02 +0100
committerThomas Gleixner <tglx@linutronix.de>2014-11-28 22:09:22 +0100
commit412fbca8dd3067438a9c8a98853299f58a5597d5 (patch)
tree201b119891dfbfc041b999a1183b1535de516a8f
parent1dbc321f50262cc1218be65cd352957df6f98a1a (diff)
downloadapic-412fbca8dd3067438a9c8a98853299f58a5597d5.tar.gz
x86, ioapic: Repair io_apic_set_affinity
Boris reported, that the rework of the ioapic to use cached entry data broke his older AMD machine. The cause for this is that the cached entry.dest field is assigned with SET_APIC_LOGICAL_ID(cfg->desc_apicid). SET_APIC_LOGICAL_ID left shifts the value by 24. This is obviously wrong as the dest field is already at the proper bit position, so the extra shift essentially cleared the dest field. Remove SET_APIC_LOGICAL_ID and assign cfg->desc_apicid directly. This got introduced in commit bfa644bfa9e3 but only becomes visible since the conversion to use cached entries in commit fda7c08b1349 'x86, irq: Use cached IOAPIC entry instead of reading from hardware' Reported-and-tested-by: Borislav Petkov <bp@suse.de> Fixes: bfa644bfa9e3 'x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces' Link: http://lkml.kernel.org/r/54789774.7030704@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/kernel/apic/io_apic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 5307320c08e647..ec193bc6712ec9 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1885,7 +1885,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data,
raw_spin_lock_irqsave(&ioapic_lock, flags);
if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
cfg = irqd_cfg(irq_data);
- data->entry.dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid);
+ data->entry.dest = cfg->dest_apicid;
data->entry.vector = cfg->vector;
for_each_irq_pin(entry, data->irq_2_pin)
__ioapic_write_entry(entry->apic, entry->pin,