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| author | Kevin Hilman <khilman@deeprootsystems.com> | 2010-01-08 15:23:06 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2010-01-08 15:23:06 -0700 |
| commit | 9b5bc5fa4b68fe2f51a5197786a8b5df82d1b8bf (patch) | |
| tree | 20783094f0034cc910110bbbadc921dbf30cb29e | |
| parent | 51e888d705d29824aebb22ddf8a1f478083386e7 (diff) | |
| download | squashfs-lzma-9b5bc5fa4b68fe2f51a5197786a8b5df82d1b8bf.tar.gz | |
OMAP3: clock: add clockdomains for UART1 & 2
UART1 & 2 were missing clockdomains resulting in broken omap_hwmod
init for these devices.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
| -rw-r--r-- | arch/arm/mach-omap2/clock34xx_data.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index 8bdcc9cc7f9af0..c60b19a27232e7 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -1500,6 +1500,7 @@ static struct clk uart2_fck = { .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_UART2_SHIFT, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1509,6 +1510,7 @@ static struct clk uart1_fck = { .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_UART1_SHIFT, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; |