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| author | Paul Gortmaker <paul.gortmaker@windriver.com> | 2017-06-02 12:19:15 -0400 |
|---|---|---|
| committer | Paul Gortmaker <paul.gortmaker@windriver.com> | 2017-06-02 12:19:15 -0400 |
| commit | 3e76429c6b2c04a2e7f2dfbb473ca75527a5cf8f (patch) | |
| tree | 775d345f61c7e14d093041a93be8ad38a9adbf36 | |
| parent | 0f37d3e6f2916a2f667bbcc0f4e95167f608b364 (diff) | |
| download | longterm-queue-4.8-3e76429c6b2c04a2e7f2dfbb473ca75527a5cf8f.tar.gz | |
clk: sunxi-ng: context refresh
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| -rw-r--r-- | queue/clk-sunxi-ng-mp-Adjust-parent-rate-for-pre-dividers.patch | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/queue/clk-sunxi-ng-mp-Adjust-parent-rate-for-pre-dividers.patch b/queue/clk-sunxi-ng-mp-Adjust-parent-rate-for-pre-dividers.patch index 588c489..e6f2b79 100644 --- a/queue/clk-sunxi-ng-mp-Adjust-parent-rate-for-pre-dividers.patch +++ b/queue/clk-sunxi-ng-mp-Adjust-parent-rate-for-pre-dividers.patch @@ -1,4 +1,4 @@ -From ac8616e4c81dded650dfade49a7da283565d37ce Mon Sep 17 00:00:00 2001 +From 5f2989d8ba6790e1416657dafcc197ccdd08720c Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai <wens@csie.org> Date: Tue, 14 Feb 2017 11:35:22 +0800 Subject: [PATCH] clk: sunxi-ng: mp: Adjust parent rate for pre-dividers @@ -19,10 +19,10 @@ Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> diff --git a/drivers/clk/sunxi-ng/ccu_mp.c b/drivers/clk/sunxi-ng/ccu_mp.c -index 22c2ca7a2a22..b583f186a804 100644 +index cbf33ef5faa9..3977aa951885 100644 --- a/drivers/clk/sunxi-ng/ccu_mp.c +++ b/drivers/clk/sunxi-ng/ccu_mp.c -@@ -85,6 +85,10 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw, +@@ -83,6 +83,10 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw, unsigned int m, p; u32 reg; @@ -33,7 +33,7 @@ index 22c2ca7a2a22..b583f186a804 100644 reg = readl(cmp->common.base + cmp->common.reg); m = reg >> cmp->m.shift; -@@ -117,6 +121,10 @@ static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate, +@@ -111,6 +115,10 @@ static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate, unsigned int m, p; u32 reg; @@ -41,9 +41,9 @@ index 22c2ca7a2a22..b583f186a804 100644 + ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux, + -1, &parent_rate); + - max_m = cmp->m.max ?: 1 << cmp->m.width; - max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1); - + ccu_mp_find_best(parent_rate, rate, + 1 << cmp->m.width, (1 << cmp->p.width) - 1, + &m, &p); -- 2.12.0 |