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| author | Paul Gortmaker <paul.gortmaker@windriver.com> | 2018-08-24 16:51:42 -0400 |
|---|---|---|
| committer | Paul Gortmaker <paul.gortmaker@windriver.com> | 2018-08-24 16:51:42 -0400 |
| commit | edbedf66accdbb260e8d0861be93829cc0cf0ca9 (patch) | |
| tree | ad64557a61310b4358c64034f8253e8f3d616a6d | |
| parent | 8eda99fc6e800ec347ed8c7db9e7d1642b0c6039 (diff) | |
| download | longterm-queue-4.12-edbedf66accdbb260e8d0861be93829cc0cf0ca9.tar.gz | |
arm: refresh TIF flags
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| -rw-r--r-- | queue/arm64-ssbd-Introduce-thread-flag-to-control-userspac.patch | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/queue/arm64-ssbd-Introduce-thread-flag-to-control-userspac.patch b/queue/arm64-ssbd-Introduce-thread-flag-to-control-userspac.patch index f71f8b6..10b069a 100644 --- a/queue/arm64-ssbd-Introduce-thread-flag-to-control-userspac.patch +++ b/queue/arm64-ssbd-Introduce-thread-flag-to-control-userspac.patch @@ -1,4 +1,4 @@ -From 9dd9614f5476687abbff8d4b12cd08ae70d7c2ad Mon Sep 17 00:00:00 2001 +From 7c515c922f8fed65b66823bc7273da845218c282 Mon Sep 17 00:00:00 2001 From: Marc Zyngier <marc.zyngier@arm.com> Date: Tue, 29 May 2018 13:11:13 +0100 Subject: [PATCH] arm64: ssbd: Introduce thread flag to control userspace @@ -19,21 +19,22 @@ Reviewed-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> +Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h -index 740aa03c5f0d..cbcf11b5e637 100644 +index f4f6c7c7b1a3..7551ebc22f14 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h -@@ -94,6 +94,7 @@ void arch_release_task_struct(struct task_struct *tsk); +@@ -89,6 +89,7 @@ struct thread_info { + #define TIF_RESTORE_SIGMASK 20 + #define TIF_SINGLESTEP 21 #define TIF_32BIT 22 /* 32bit process */ - #define TIF_SVE 23 /* Scalable Vector Extension in use */ - #define TIF_SVE_VL_INHERIT 24 /* Inherit sve_vl_onexec across exec */ +#define TIF_SSBD 25 /* Wants SSB mitigation */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S -index e6f6e2339b22..28ad8799406f 100644 +index 5a585976d14c..c1ffa95c0ad2 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -147,6 +147,8 @@ alternative_cb arm64_enable_wa2_handling |