patches-3.8.13-rt10.tar.xzv3.8.13-rt10

md5sum:
f8bdf35b6f2e7d9aced0c5e11612eab7  /tmp/patches-3.8.13-rt10.tar.xz

Announce:
 ------------
 Dear RT Folks,

 I'm pleased to announce the 3.8.13-rt10 release.

 changes since v3.8.13-rt9:
 - x86's mce timer was not scheduled properly due do missing µsec -> nsec
   conversation. Fix sent by Mike Galbraith.
 - 32bit PowerPC missed to check _TIF_NEED_RESCHED and call
   preempt_schedule_irq() if needed. Fix sent by Priyanka Jain.

 Known issues:

     - SLxB is broken on PowerPC, e500 based cpus. Can't repdroduce the
       problem on mpc5200 based board.

 The delta patch against v3.8.13-rt9 is appended below and can be found here:

   https://www.kernel.org/pub/linux/kernel/projects/rt/3.8/incr/patch-3.8.13-rt9-rt10.patch.xz

 The RT patch against 3.8.11 can be found here:

   https://www.kernel.org/pub/linux/kernel/projects/rt/3.8/patch-3.8.13-rt10.patch.xz

 The split quilt queue is available at:

   https://www.kernel.org/pub/linux/kernel/projects/rt/3.8/patches-3.8.13-rt10.tar.xz

 Sebastian

 [delta patch snipped]
 ------------

http://marc.info/?l=linux-rt-users&m=137002957605020&w=2

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>

4 files changed, 101 insertions, 1 deletions

diff --git a/patches/localversion.patch b/patches/localversion.patch
index e8753c7..458b434 100644
--- a/patches/localversion.patch
+++ b/patches/localversion.patch
@@ -12,4 +12,4 @@ Link: http://lkml.kernel.org/n/tip-8vdw4bfcsds27cvox6rpb334@git.kernel.org
 --- /dev/null
 +++ b/localversion-rt
 @@ -0,0 +1 @@
-+-rt9
++-rt10
diff --git a/patches/powerpc-32bit-Store-temporary-result-in-r0-instead-o.patch b/patches/powerpc-32bit-Store-temporary-result-in-r0-instead-o.patch
new file mode 100644
index 0000000..54cdde0
--- /dev/null
+++ b/patches/powerpc-32bit-Store-temporary-result-in-r0-instead-o.patch
@@ -0,0 +1,45 @@
+From d250f8f620861291ac23263c1b0159e0db51afba Mon Sep 17 00:00:00 2001
+From: Priyanka Jain <Priyanka.Jain@freescale.com>
+Date: Mon, 27 May 2013 13:00:17 +0530
+Subject: [PATCH] powerpc/32bit:Store temporary result in r0 instead of r8
+
+While returning from exception handling in case of PREEMPT enabled,
+_TIF_NEED_RESCHED bit is checked in TI_FLAGS (thread_info flag) of current
+task. Only if this bit is set, it should continue with the process of
+calling preempt_schedule_irq() to schedule highest priority task if
+available.
+
+Current code assumes that r8 contains TI_FLAGS and check this for
+_TIF_NEED_RESCHED, but as r8 is modified in the code which executes before
+this check, r8 no longer contains the expected TI_FLAGS information.
+
+As a result check for comparison with _TIF_NEED_RESCHED was failing even if
+NEED_RESCHED bit is set in the current thread_info flag. Due to this,
+preempt_schedule_irq() and in turn scheduler was not getting called even if
+highest priority task is ready for execution.
+
+So, store temporary results in r0 instead of r8 to prevent r8 from getting
+modified as subsequent code is dependent on its value.
+
+Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
+Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+---
+ arch/powerpc/kernel/entry_32.S |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
+index 95b884e..086dce7 100644
+--- a/arch/powerpc/kernel/entry_32.S
++++ b/arch/powerpc/kernel/entry_32.S
+@@ -851,7 +851,7 @@ user_exc_return:		/* r10 contains MSR_KERNEL here */
+ 	/* check current_thread_info, _TIF_EMULATE_STACK_STORE */
+ 	CURRENT_THREAD_INFO(r9, r1)
+ 	lwz	r8,TI_FLAGS(r9)
+-	andis.	r8,r8,_TIF_EMULATE_STACK_STORE@h
++	andis.	r0,r8,_TIF_EMULATE_STACK_STORE@h
+ 	beq+	1f
+ 
+ 	addi	r8,r1,INT_FRAME_SIZE	/* Get the kprobed function entry */
+-- 
+1.7.10.4
+
diff --git a/patches/series b/patches/series
index aeb82d3..51ee846 100644
--- a/patches/series
+++ b/patches/series
@@ -63,6 +63,7 @@ arm-allow-irq-threading.patch
 # Submitted to PPC ML
 ############################################################
 ppc-mark-low-level-handlers-no-thread.patch
+powerpc-32bit-Store-temporary-result-in-r0-instead-o.patch
 
 ############################################################
 # Submitted on LKML
@@ -447,6 +448,7 @@ fs-ntfs-disable-interrupt-non-rt.patch
 
 # X86
 x86-mce-timer-hrtimer.patch
+x86-mce-fix-mce-timer-interval.patch
 x86-mce-Defer-mce-wakeups-to-threads-for-PREEMPT_RT.patch
 x86-stackprot-no-random-on-rt.patch
 x86-use-gen-rwsem-spinlocks-rt.patch
diff --git a/patches/x86-mce-fix-mce-timer-interval.patch b/patches/x86-mce-fix-mce-timer-interval.patch
new file mode 100644
index 0000000..3151884
--- /dev/null
+++ b/patches/x86-mce-fix-mce-timer-interval.patch
@@ -0,0 +1,53 @@
+From b69721d1af317f491ae7090d338d82528745612a Mon Sep 17 00:00:00 2001
+From: Mike Galbraith <bitbucket@online.de>
+Date: Wed, 29 May 2013 13:52:13 +0200
+Subject: [PATCH] x86/mce: fix mce timer interval
+
+Seems mce timer fire at the wrong frequency in -rt kernels since roughly
+forever due to 32 bit overflow.  3.8-rt is also missing a multiplier.
+
+Add missing us -> ns conversion and 32 bit overflow prevention.
+
+Cc: stable-rt@vger.kernel.org
+Signed-off-by: Mike Galbraith <bitbucket@online.de>
+[bigeasy: use ULL instead of u64 cast]
+Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+---
+ arch/x86/kernel/cpu/mcheck/mce.c |    7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
+index 332e133..f54c5bf 100644
+--- a/arch/x86/kernel/cpu/mcheck/mce.c
++++ b/arch/x86/kernel/cpu/mcheck/mce.c
+@@ -1295,7 +1295,8 @@ static enum hrtimer_restart mce_timer_fn(struct hrtimer *timer)
+ 	__this_cpu_write(mce_next_interval, iv);
+ 	/* Might have become 0 after CMCI storm subsided */
+ 	if (iv) {
+-		hrtimer_forward_now(timer, ns_to_ktime(jiffies_to_usecs(iv)));
++		hrtimer_forward_now(timer, ns_to_ktime(
++					jiffies_to_usecs(iv) * 1000ULL));
+ 		return HRTIMER_RESTART;
+ 	}
+ 	return HRTIMER_NORESTART;
+@@ -1323,7 +1324,7 @@ void mce_timer_kick(unsigned long interval)
+ 		}
+ 	} else {
+ 		hrtimer_start_range_ns(t,
+-				ns_to_ktime(jiffies_to_usecs(interval) * 1000),
++			ns_to_ktime(jiffies_to_usecs(interval) * 1000ULL),
+ 				0, HRTIMER_MODE_REL_PINNED);
+ 	}
+ 	if (interval < iv)
+@@ -1691,7 +1692,7 @@ static void mce_start_timer(unsigned int cpu, struct hrtimer *t)
+ 	if (mca_cfg.ignore_ce || !iv)
+ 		return;
+ 
+-	hrtimer_start_range_ns(t, ns_to_ktime(jiffies_to_usecs(iv) * 1000),
++	hrtimer_start_range_ns(t, ns_to_ktime(jiffies_to_usecs(iv) * 1000ULL),
+ 			0, HRTIMER_MODE_REL_PINNED);
+ }
+ 
+-- 
+1.7.10.4
+