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authorVadim Pasternak <vadimp@nvidia.com>2022-07-13 12:14:05 +0300
committerWolfram Sang <wsa@kernel.org>2022-07-16 14:17:11 +0200
commite1f77ecc75aaee6bed04e8fd7830e00032af012e (patch)
treeac5ea1e8ff37e4bc1b1542bb47abf6eaf8df0606
parent32346491ddf24599decca06190ebca03ff9de7f8 (diff)
downloadlinux-e1f77ecc75aaee6bed04e8fd7830e00032af012e.tar.gz
i2c: mlxcpld: Fix register setting for 400KHz frequency
Fix setting of 'Half Cycle' register for 400KHz frequency. Fixes: fa1049135c15 ("i2c: mlxcpld: Modify register setting for 400KHz frequency") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
-rw-r--r--drivers/i2c/busses/i2c-mlxcpld.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c
index 56aa424fd71d5c..815cc561386b02 100644
--- a/drivers/i2c/busses/i2c-mlxcpld.c
+++ b/drivers/i2c/busses/i2c-mlxcpld.c
@@ -49,7 +49,7 @@
#define MLXCPLD_LPCI2C_NACK_IND 2
#define MLXCPLD_I2C_FREQ_1000KHZ_SET 0x04
-#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0c
+#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0e
#define MLXCPLD_I2C_FREQ_100KHZ_SET 0x42
enum mlxcpld_i2c_frequency {