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| author | Eric Auger <eric.auger@redhat.com> | 2020-04-03 09:13:19 +0200 |
|---|---|---|
| committer | Andrew Jones <drjones@redhat.com> | 2020-04-03 09:50:03 +0200 |
| commit | 784ee933fa5f1c5d4a2818d2bf24dcc194e0f33d (patch) | |
| tree | 8f127f4ed826392f7b7281e6811db14efef3c8dd | |
| parent | 8f747a8540721eebf91b78432504bdd66657f484 (diff) | |
| download | kvm-unit-tests-784ee933fa5f1c5d4a2818d2bf24dcc194e0f33d.tar.gz | |
arm: pmu: Introduce defines for PMU versions
Introduce some defines encoding the different PMU versions.
v3 is encoded differently in 32 and 64 bits.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
| -rw-r--r-- | arm/pmu.c | 26 |
1 files changed, 21 insertions, 5 deletions
@@ -45,6 +45,15 @@ static struct pmu pmu; #define ID_DFR0_PERFMON_SHIFT 24 #define ID_DFR0_PERFMON_MASK 0xf +#define ID_DFR0_PMU_NOTIMPL 0b0000 +#define ID_DFR0_PMU_V1 0b0001 +#define ID_DFR0_PMU_V2 0b0010 +#define ID_DFR0_PMU_V3 0b0011 +#define ID_DFR0_PMU_V3_8_1 0b0100 +#define ID_DFR0_PMU_V3_8_4 0b0101 +#define ID_DFR0_PMU_V3_8_5 0b0110 +#define ID_DFR0_PMU_IMPDEF 0b1111 + #define PMCR __ACCESS_CP15(c9, 0, c12, 0) #define ID_DFR0 __ACCESS_CP15(c0, 0, c1, 2) #define PMSELR __ACCESS_CP15(c9, 0, c12, 5) @@ -105,6 +114,13 @@ static inline void precise_instrs_loop(int loop, uint32_t pmcr) #define ID_AA64DFR0_PERFMON_SHIFT 8 #define ID_AA64DFR0_PERFMON_MASK 0xf +#define ID_DFR0_PMU_NOTIMPL 0b0000 +#define ID_DFR0_PMU_V3 0b0001 +#define ID_DFR0_PMU_V3_8_1 0b0100 +#define ID_DFR0_PMU_V3_8_4 0b0101 +#define ID_DFR0_PMU_V3_8_5 0b0110 +#define ID_DFR0_PMU_IMPDEF 0b1111 + static inline uint32_t get_id_aa64dfr0(void) { return read_sysreg(id_aa64dfr0_el1); } static inline uint32_t get_pmcr(void) { return read_sysreg(pmcr_el0); } static inline void set_pmcr(uint32_t v) { write_sysreg(v, pmcr_el0); } @@ -116,7 +132,7 @@ static inline void set_pmccfiltr(uint32_t v) { write_sysreg(v, pmccfiltr_el0); } static inline uint8_t get_pmu_version(void) { uint8_t ver = (get_id_aa64dfr0() >> ID_AA64DFR0_PERFMON_SHIFT) & ID_AA64DFR0_PERFMON_MASK; - return ver == 1 ? 3 : ver; + return ver; } /* @@ -249,7 +265,7 @@ static bool check_cpi(int cpi) static void pmccntr64_test(void) { #ifdef __arm__ - if (pmu.version == 0x3) { + if (pmu.version == ID_DFR0_PMU_V3) { if (ERRATA(9e3f7a296940)) { write_sysreg(0xdead, PMCCNTR64); report(read_sysreg(PMCCNTR64) == 0xdead, "pmccntr64"); @@ -262,13 +278,13 @@ static void pmccntr64_test(void) /* Return FALSE if no PMU found, otherwise return TRUE */ static bool pmu_probe(void) { - uint32_t pmcr; + uint32_t pmcr = get_pmcr(); pmu.version = get_pmu_version(); - if (pmu.version == 0 || pmu.version == 0xf) + if (pmu.version == ID_DFR0_PMU_NOTIMPL || pmu.version == ID_DFR0_PMU_IMPDEF) return false; - report_info("PMU version: %d", pmu.version); + report_info("PMU version: 0x%x", pmu.version); pmcr = get_pmcr(); report_info("PMU implementer/ID code: %#x(\"%c\")/%#x", |