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| author | Dave Martin <Dave.Martin@arm.com> | 2019-01-18 16:14:14 +0000 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2019-01-22 06:55:22 +0000 |
| commit | 5ae841d17ba297d75843035135cee35ee6b68f0a (patch) | |
| tree | a1b086c863bf828d370fcc8ddc3fab96365fe809 | |
| parent | 1bbe92f568513662589b1a159be01fd27f8bf27d (diff) | |
| download | kvmtool-5ae841d17ba297d75843035135cee35ee6b68f0a.tar.gz | |
arm64: Correct ARM64_CORE_REG() size encodings for all core registers
ARM64_CORE_REG() is currently only used to generate the KVM
register IDs for registers that happen to be 64 bits in size, so
KVM_REG_SIZE_U64 is hard-coded in the definition.
To enable this macro to generate correct encodings for the FPSIMD
registers too (which are a mix of 128-bit and 32-bit registers),
this patch extends the macro to encode the correct size for each
class of register in KVM_REG_ARM_CORE.
The approach is crude, but because the KVM_REG_ARM_CORE ID
arrangement is ABI, it's not expected to evolve.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | arm/aarch64/kvm-cpu.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c index 1b293748..0aaefaf2 100644 --- a/arm/aarch64/kvm-cpu.c +++ b/arm/aarch64/kvm-cpu.c @@ -12,8 +12,21 @@ #define SCTLR_EL1_E0E_MASK (1 << 24) #define SCTLR_EL1_EE_MASK (1 << 25) -#define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ - KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) +static __u64 __core_reg_id(__u64 offset) +{ + __u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; + + if (offset < KVM_REG_ARM_CORE_REG(fp_regs)) + id |= KVM_REG_SIZE_U64; + else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr)) + id |= KVM_REG_SIZE_U128; + else + id |= KVM_REG_SIZE_U32; + + return id; +} + +#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x)) unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) { |