Clean up image layout

This patch moves page tables and vectors to their own section, in order
to avoid big alignment gaps in the middle of .text or .data. We also
remove all .org directives, as they are not needed.

Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>

7 files changed, 13 insertions, 16 deletions

diff --git a/boot.S b/boot.S
index c65590c..a0eccae 100644
--- a/boot.S
+++ b/boot.S
@@ -36,5 +36,3 @@ _start:
 	b	start_el3
 
 	.ltorg
-
-	.org	0x100
diff --git a/cache.S b/cache.S
index 081b8a7..6ccf578 100644
--- a/cache.S
+++ b/cache.S
@@ -78,4 +78,3 @@ dcaches_done:
 	ret
 
 	.ltorg
-	.org 0x100
diff --git a/mmu.S b/mmu.S
index 5468b5e..207340c 100644
--- a/mmu.S
+++ b/mmu.S
@@ -41,7 +41,7 @@
 #define BLOCK_DEV_1GB(_pa)	(DEV_ATTR_UPPER | BLOCK_1GB_PA(_pa) | \
 				 DEV_ATTR_LOWER | BLOCK_VALID)
 
-	.data
+	.section .pgtables, "w"
 
 #define BLOCK_INVALID	(0 << 0)
 
@@ -111,7 +111,7 @@ switch_to_idmap:
 	dsb	sy
 	isb
 
-	adr	x0, pgtable_l1
+	ldr	x0, =pgtable_l1
 	msr	ttbr0_el3, x0
 
 	ldr	x0, =MAIR_ATTR
diff --git a/model.lds.S b/model.lds.S
index 09a2452..3d012ee 100644
--- a/model.lds.S
+++ b/model.lds.S
@@ -21,12 +21,14 @@ INPUT(FILESYSTEM)
 SECTIONS
 {
 	. = PHYS_OFFSET;
-	.text : { boot.o }
-	.text : { cache.o }
-	.text : { GIC }
-	.text : { mmu.o }
-	.text : { ns.o }
-	.text : { BOOTMETHOD }
+	.text : { boot.o(.text .data) }
+	.text : { cache.o(.text .data) }
+	.text : { GIC(.text .data) }
+	.text : { mmu.o(.text .data) }
+	.text : { ns.o(.text) }
+	.text : { BOOTMETHOD(.text .data) }
+	.text : { *(.vectors) }
+	.text : { *(.pgtables) }
 	. = PHYS_OFFSET + MBOX_OFFSET;
 	mbox = .;
 	.mbox : { QUAD(0x0) }
diff --git a/ns.S b/ns.S
index d3feb4a..21b6d45 100644
--- a/ns.S
+++ b/ns.S
@@ -44,4 +44,3 @@ ns_init_system:
 	ret
 
 	.ltorg
-	.org 0x80
diff --git a/psci.S b/psci.S
index 8ad838c..548a4b8 100644
--- a/psci.S
+++ b/psci.S
@@ -28,7 +28,7 @@
 	b	\label
 	.endm
 
-	.data
+	.section .vectors, "w"
 
 	.align 11
 vector:
@@ -56,6 +56,7 @@ vector:
 	ventry	err_exception
 	ventry	err_exception
 
+	.data
 	/*
 	 * Array of the CPU ID (MPIDR & MPIDR_ID_BITS) of each CPU in the system.
 	 * The index into the array is used as a logical id, and an index into
@@ -176,7 +177,7 @@ __find_logical_index:
 	ret
 
 setup_vector:
-	adr	x0, vector
+	ldr	x0, =vector
 	msr	VBAR_EL3, x0
 	isb
 	ret
diff --git a/spin.S b/spin.S
index 04101cc..00f21bf 100644
--- a/spin.S
+++ b/spin.S
@@ -55,5 +55,3 @@ start_no_el3:
 	b	kernel
 
 	.ltorg
-
-	.org	0x80