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| author | Anshuman Khandual <anshuman.khandual@arm.com> | 2021-02-11 16:56:37 +0530 |
|---|---|---|
| committer | Mark Rutland <mark.rutland@arm.com> | 2021-02-25 18:28:24 +0000 |
| commit | 22fc09cddd96dda9118faaa5c734e59949d9ae41 (patch) | |
| tree | dcd378768d302c93666f4b587cd3e6a18da18aaf | |
| parent | 8d5a765251d9113c3c0f9fa14de42a9e7486fe8a (diff) | |
| download | boot-wrapper-aarch64-22fc09cddd96dda9118faaa5c734e59949d9ae41.tar.gz | |
aarch64: Enable TRBE for the non-secure world
MDCR_EL3.NSTB resets to an UNKNOWN value. Configure it to allow the trace
buffer to use non-secure memory and to permit direct register accesses from
the non-secure world. Before that, just check AA64DFR0_EL1.TraceBuffer and
make sure TRBE is implemented. We still continue to reset MDCR_EL3 register
to zero with the exception of MDCR_EL3.NSPB and MDCR_EL3.NSTB.
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
| -rw-r--r-- | arch/aarch64/boot.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index 37f4b98..e47cf59 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -71,6 +71,14 @@ _start: ldr x1, =(0x3 << 12) orr x0, x0, x1 +1: mrs x1, id_aa64dfr0_el1 + ubfx x1, x1, #44, #4 + cbz x1, 1f + + // Enable TRBE for the non-secure world. + ldr x1, =(0x3 << 24) + orr x0, x0, x1 + 1: msr mdcr_el3, x0 // Disable traps to EL3 mrs x0, id_aa64pfr0_el1 |