some mfd patches from intel

10 files changed, 887 insertions, 0 deletions

diff --git a/patches.intel/mfd-delete-non-required-instances-of-include-linux-init.h.patch b/patches.intel/mfd-delete-non-required-instances-of-include-linux-init.h.patch
new file mode 100644
index 0000000000000..fb0984d00db40
--- /dev/null
+++ b/patches.intel/mfd-delete-non-required-instances-of-include-linux-init.h.patch
@@ -0,0 +1,255 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:33 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:06 +0800
+Subject: [LTSI-dev] [PATCH 01/16] mfd: Delete non-required instances of include <linux/init.h>
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-2-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+None of these files are actually using any __init type directives
+and hence don't need to include <linux/init.h>.  Most are just a
+left over from __devinit and __cpuinit removal, or simply due to
+code getting copied from one driver to the next.
+
+Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit 3c699105d0376c14940ce7cf561754a94cdff8dd)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/adp5520.c             |    1 -
+ drivers/mfd/cs5535-mfd.c          |    1 -
+ drivers/mfd/janz-cmodio.c         |    1 -
+ drivers/mfd/lpc_ich.c             |    1 -
+ drivers/mfd/lpc_sch.c             |    1 -
+ drivers/mfd/mcp-sa11x0.c          |    1 -
+ drivers/mfd/pcf50633-adc.c        |    1 -
+ drivers/mfd/rc5t583-irq.c         |    1 -
+ drivers/mfd/rdc321x-southbridge.c |    1 -
+ drivers/mfd/retu-mfd.c            |    1 -
+ drivers/mfd/smsc-ece1099.c        |    1 -
+ drivers/mfd/ti-ssp.c              |    1 -
+ drivers/mfd/ti_am335x_tscadc.c    |    1 -
+ drivers/mfd/tps65912-core.c       |    1 -
+ drivers/mfd/tps65912-irq.c        |    1 -
+ drivers/mfd/twl4030-irq.c         |    1 -
+ drivers/mfd/twl4030-madc.c        |    1 -
+ drivers/mfd/twl6030-irq.c         |    1 -
+ drivers/mfd/vexpress-config.c     |    1 -
+ drivers/mfd/wm8350-core.c         |    1 -
+ drivers/mfd/wm8350-irq.c          |    1 -
+ 21 files changed, 21 deletions(-)
+
+--- a/drivers/mfd/adp5520.c
++++ b/drivers/mfd/adp5520.c
+@@ -20,7 +20,6 @@
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+-#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+--- a/drivers/mfd/cs5535-mfd.c
++++ b/drivers/mfd/cs5535-mfd.c
+@@ -23,7 +23,6 @@
+  */
+ 
+ #include <linux/kernel.h>
+-#include <linux/init.h>
+ #include <linux/mfd/core.h>
+ #include <linux/module.h>
+ #include <linux/pci.h>
+--- a/drivers/mfd/janz-cmodio.c
++++ b/drivers/mfd/janz-cmodio.c
+@@ -13,7 +13,6 @@
+ 
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/pci.h>
+ #include <linux/interrupt.h>
+ #include <linux/delay.h>
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -58,7 +58,6 @@
+ 
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+ 
+-#include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/errno.h>
+--- a/drivers/mfd/lpc_sch.c
++++ b/drivers/mfd/lpc_sch.c
+@@ -23,7 +23,6 @@
+  *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+  */
+ 
+-#include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+ #include <linux/errno.h>
+--- a/drivers/mfd/mcp-sa11x0.c
++++ b/drivers/mfd/mcp-sa11x0.c
+@@ -12,7 +12,6 @@
+  *  MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
+  */
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/io.h>
+ #include <linux/errno.h>
+ #include <linux/kernel.h>
+--- a/drivers/mfd/pcf50633-adc.c
++++ b/drivers/mfd/pcf50633-adc.c
+@@ -19,7 +19,6 @@
+ #include <linux/kernel.h>
+ #include <linux/slab.h>
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/device.h>
+ #include <linux/platform_device.h>
+ #include <linux/completion.h>
+--- a/drivers/mfd/rc5t583-irq.c
++++ b/drivers/mfd/rc5t583-irq.c
+@@ -22,7 +22,6 @@
+  */
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+-#include <linux/init.h>
+ #include <linux/i2c.h>
+ #include <linux/mfd/rc5t583.h>
+ 
+--- a/drivers/mfd/rdc321x-southbridge.c
++++ b/drivers/mfd/rdc321x-southbridge.c
+@@ -19,7 +19,6 @@
+  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+  *
+  */
+-#include <linux/init.h>
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+ #include <linux/platform_device.h>
+--- a/drivers/mfd/retu-mfd.c
++++ b/drivers/mfd/retu-mfd.c
+@@ -19,7 +19,6 @@
+ #include <linux/err.h>
+ #include <linux/i2c.h>
+ #include <linux/irq.h>
+-#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/mutex.h>
+ #include <linux/module.h>
+--- a/drivers/mfd/smsc-ece1099.c
++++ b/drivers/mfd/smsc-ece1099.c
+@@ -13,7 +13,6 @@
+ 
+ #include <linux/module.h>
+ #include <linux/moduleparam.h>
+-#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/i2c.h>
+ #include <linux/gpio.h>
+--- a/drivers/mfd/ti-ssp.c
++++ b/drivers/mfd/ti-ssp.c
+@@ -23,7 +23,6 @@
+ #include <linux/module.h>
+ #include <linux/slab.h>
+ #include <linux/err.h>
+-#include <linux/init.h>
+ #include <linux/wait.h>
+ #include <linux/clk.h>
+ #include <linux/interrupt.h>
+--- a/drivers/mfd/ti_am335x_tscadc.c
++++ b/drivers/mfd/ti_am335x_tscadc.c
+@@ -14,7 +14,6 @@
+  */
+ 
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/err.h>
+ #include <linux/io.h>
+--- a/drivers/mfd/tps65912-core.c
++++ b/drivers/mfd/tps65912-core.c
+@@ -15,7 +15,6 @@
+ 
+ #include <linux/module.h>
+ #include <linux/moduleparam.h>
+-#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/gpio.h>
+ #include <linux/mfd/core.h>
+--- a/drivers/mfd/tps65912-irq.c
++++ b/drivers/mfd/tps65912-irq.c
+@@ -15,7 +15,6 @@
+ 
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/bug.h>
+ #include <linux/device.h>
+ #include <linux/interrupt.h>
+--- a/drivers/mfd/twl4030-irq.c
++++ b/drivers/mfd/twl4030-irq.c
+@@ -27,7 +27,6 @@
+  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+  */
+ 
+-#include <linux/init.h>
+ #include <linux/export.h>
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+--- a/drivers/mfd/twl4030-madc.c
++++ b/drivers/mfd/twl4030-madc.c
+@@ -29,7 +29,6 @@
+  *
+  */
+ 
+-#include <linux/init.h>
+ #include <linux/device.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+--- a/drivers/mfd/twl6030-irq.c
++++ b/drivers/mfd/twl6030-irq.c
+@@ -31,7 +31,6 @@
+  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+  */
+ 
+-#include <linux/init.h>
+ #include <linux/export.h>
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+--- a/drivers/mfd/vexpress-config.c
++++ b/drivers/mfd/vexpress-config.c
+@@ -16,7 +16,6 @@
+ #include <linux/bitops.h>
+ #include <linux/completion.h>
+ #include <linux/export.h>
+-#include <linux/init.h>
+ #include <linux/list.h>
+ #include <linux/of.h>
+ #include <linux/of_device.h>
+--- a/drivers/mfd/wm8350-core.c
++++ b/drivers/mfd/wm8350-core.c
+@@ -14,7 +14,6 @@
+ 
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/slab.h>
+ #include <linux/bug.h>
+ #include <linux/device.h>
+--- a/drivers/mfd/wm8350-irq.c
++++ b/drivers/mfd/wm8350-irq.c
+@@ -14,7 +14,6 @@
+ 
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+-#include <linux/init.h>
+ #include <linux/bug.h>
+ #include <linux/device.h>
+ #include <linux/interrupt.h>
diff --git a/patches.intel/mfd-lpc_ich-add-support-for-intel-avoton-gpios.patch b/patches.intel/mfd-lpc_ich-add-support-for-intel-avoton-gpios.patch
new file mode 100644
index 0000000000000..8e3548a426043
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-add-support-for-intel-avoton-gpios.patch
@@ -0,0 +1,41 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:41 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:08 +0800
+Subject: [LTSI-dev] [PATCH 03/16] mfd: lpc_ich: Add support for Intel Avoton GPIOs
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-4-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Vincent Donnefort <vdonnefort@gmail.com>
+
+Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit facd9939403cb5769190054a600474399e776e3a)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c       |    1 +
+ include/linux/mfd/lpc_ich.h |    1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -499,6 +499,7 @@ static struct lpc_ich_info lpc_chipset_i
+ 	[LPC_AVN] = {
+ 		.name = "Avoton SoC",
+ 		.iTCO_version = 1,
++		.gpio_version = AVOTON_GPIO,
+ 	},
+ 	[LPC_COLETO] = {
+ 		.name = "Coleto Creek",
+--- a/include/linux/mfd/lpc_ich.h
++++ b/include/linux/mfd/lpc_ich.h
+@@ -39,6 +39,7 @@ enum {
+ 	ICH_V9_GPIO,
+ 	ICH_V10CORP_GPIO,
+ 	ICH_V10CONS_GPIO,
++	AVOTON_GPIO,
+ };
+ 
+ struct lpc_ich_info {
diff --git a/patches.intel/mfd-lpc_ich-add-support-for-itco-v3.patch b/patches.intel/mfd-lpc_ich-add-support-for-itco-v3.patch
new file mode 100644
index 0000000000000..58e1220d23048
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-add-support-for-itco-v3.patch
@@ -0,0 +1,218 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:57 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:12 +0800
+Subject: [LTSI-dev]  [PATCH 07/16] mfd: lpc_ich: Add support for iTCO v3
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-8-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Peter Tyser <ptyser@xes-inc.com>
+
+Some newer Atom CPUs, eg Avoton and Bay Trail, use slightly different
+register layouts for the iTCO than the current v1 and v2 iTCO.
+Differences from previous iTCO versions include:
+- The ACPI space is enabled in the "ACPI base address" register instead
+  of the "ACPI control register"
+
+- The "no reboot" functionality is set in the "Power Management
+  Configuration" register instead of the "General Control and Status"
+  (GCS) register or PCI configuration space.
+
+- The "ACPI Control Register" is not present on v3.  The "Power
+  Management Configuration Base Address" register resides at the same
+  address is Avoton/Bay Trail.
+
+To differentiate these newer chipsets create a new v3 iTCO version and
+update the MFD driver to support them.
+
+Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+Tested-by: Rajat Jain <rajatjain@juniper.net>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit eb71d4dec4a5e010e34b9d7afdb5af41884c388e)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c       |   81 ++++++++++++++++++++++++++++++++++++--------
+ include/linux/mfd/lpc_ich.h |    8 ++--
+ 2 files changed, 71 insertions(+), 18 deletions(-)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -71,9 +71,11 @@
+ #define ACPIBASE_GPE_END	0x2f
+ #define ACPIBASE_SMI_OFF	0x30
+ #define ACPIBASE_SMI_END	0x33
++#define ACPIBASE_PMC_OFF	0x08
++#define ACPIBASE_PMC_END	0x0c
+ #define ACPIBASE_TCO_OFF	0x60
+ #define ACPIBASE_TCO_END	0x7f
+-#define ACPICTRL		0x44
++#define ACPICTRL_PMCBASE	0x44
+ 
+ #define ACPIBASE_GCS_OFF	0x3410
+ #define ACPIBASE_GCS_END	0x3414
+@@ -93,11 +95,12 @@ struct lpc_ich_priv {
+ 	int chipset;
+ 
+ 	int abase;		/* ACPI base */
+-	int actrl;		/* ACPI control or PMC base */
++	int actrl_pbase;	/* ACPI control or PMC base */
+ 	int gbase;		/* GPIO base */
+ 	int gctrl;		/* GPIO control */
+ 
+-	int actrl_save;		/* Cached ACPI control base value */
++	int abase_save;		/* Cached ACPI base value */
++	int actrl_pbase_save;		/* Cached ACPI control or PMC base value */
+ 	int gctrl_save;		/* Cached GPIO control value */
+ };
+ 
+@@ -110,7 +113,7 @@ static struct resource wdt_ich_res[] = {
+ 	{
+ 		.flags = IORESOURCE_IO,
+ 	},
+-	/* GCS */
++	/* GCS or PMC */
+ 	{
+ 		.flags = IORESOURCE_MEM,
+ 	},
+@@ -742,9 +745,15 @@ static void lpc_ich_restore_config_space
+ {
+ 	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+ 
+-	if (priv->actrl_save >= 0) {
+-		pci_write_config_byte(dev, priv->actrl, priv->actrl_save);
+-		priv->actrl_save = -1;
++	if (priv->abase_save >= 0) {
++		pci_write_config_byte(dev, priv->abase, priv->abase_save);
++		priv->abase_save = -1;
++	}
++
++	if (priv->actrl_pbase_save >= 0) {
++		pci_write_config_byte(dev, priv->actrl_pbase,
++			priv->actrl_pbase_save);
++		priv->actrl_pbase_save = -1;
+ 	}
+ 
+ 	if (priv->gctrl_save >= 0) {
+@@ -758,9 +767,26 @@ static void lpc_ich_enable_acpi_space(st
+ 	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+ 	u8 reg_save;
+ 
+-	pci_read_config_byte(dev, priv->actrl, &reg_save);
+-	pci_write_config_byte(dev, priv->actrl, reg_save | 0x80);
+-	priv->actrl_save = reg_save;
++	switch (lpc_chipset_info[priv->chipset].iTCO_version) {
++	case 3:
++		/*
++		 * Some chipsets (eg Avoton) enable the ACPI space in the
++		 * ACPI BASE register.
++		 */
++		pci_read_config_byte(dev, priv->abase, &reg_save);
++		pci_write_config_byte(dev, priv->abase, reg_save | 0x2);
++		priv->abase_save = reg_save;
++		break;
++	default:
++		/*
++		 * Most chipsets enable the ACPI space in the ACPI control
++		 * register.
++		 */
++		pci_read_config_byte(dev, priv->actrl_pbase, &reg_save);
++		pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x80);
++		priv->actrl_pbase_save = reg_save;
++		break;
++	}
+ }
+ 
+ static void lpc_ich_enable_gpio_space(struct pci_dev *dev)
+@@ -773,6 +799,17 @@ static void lpc_ich_enable_gpio_space(st
+ 	priv->gctrl_save = reg_save;
+ }
+ 
++static void lpc_ich_enable_pmc_space(struct pci_dev *dev)
++{
++	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
++	u8 reg_save;
++
++	pci_read_config_byte(dev, priv->actrl_pbase, &reg_save);
++	pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x2);
++
++	priv->actrl_pbase_save = reg_save;
++}
++
+ static void lpc_ich_finalize_cell(struct pci_dev *dev, struct mfd_cell *cell)
+ {
+ 	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+@@ -910,14 +947,20 @@ static int lpc_ich_init_wdt(struct pci_d
+ 	lpc_ich_enable_acpi_space(dev);
+ 
+ 	/*
++	 * iTCO v2:
+ 	 * Get the Memory-Mapped GCS register. To get access to it
+ 	 * we have to read RCBA from PCI Config space 0xf0 and use
+ 	 * it as base. GCS = RCBA + ICH6_GCS(0x3410).
++	 *
++	 * iTCO v3:
++	 * Get the Power Management Configuration register.  To get access
++	 * to it we have to read the PMC BASE from config space and address
++	 * the register at offset 0x8.
+ 	 */
+ 	if (lpc_chipset_info[priv->chipset].iTCO_version == 1) {
+ 		/* Don't register iomem for TCO ver 1 */
+ 		lpc_ich_cells[LPC_WDT].num_resources--;
+-	} else {
++	} else if (lpc_chipset_info[priv->chipset].iTCO_version == 2) {
+ 		pci_read_config_dword(dev, RCBABASE, &base_addr_cfg);
+ 		base_addr = base_addr_cfg & 0xffffc000;
+ 		if (!(base_addr_cfg & 1)) {
+@@ -926,9 +969,17 @@ static int lpc_ich_init_wdt(struct pci_d
+ 			ret = -ENODEV;
+ 			goto wdt_done;
+ 		}
+-		res = wdt_mem_res(ICH_RES_MEM_GCS);
++		res = wdt_mem_res(ICH_RES_MEM_GCS_PMC);
+ 		res->start = base_addr + ACPIBASE_GCS_OFF;
+ 		res->end = base_addr + ACPIBASE_GCS_END;
++	} else if (lpc_chipset_info[priv->chipset].iTCO_version == 3) {
++		lpc_ich_enable_pmc_space(dev);
++		pci_read_config_dword(dev, ACPICTRL_PMCBASE, &base_addr_cfg);
++		base_addr = base_addr_cfg & 0xfffffe00;
++
++		res = wdt_mem_res(ICH_RES_MEM_GCS_PMC);
++		res->start = base_addr + ACPIBASE_PMC_OFF;
++		res->end = base_addr + ACPIBASE_PMC_END;
+ 	}
+ 
+ 	lpc_ich_finalize_cell(dev, &lpc_ich_cells[LPC_WDT]);
+@@ -953,9 +1004,11 @@ static int lpc_ich_probe(struct pci_dev
+ 
+ 	priv->chipset = id->driver_data;
+ 
+-	priv->actrl_save = -1;
++	priv->actrl_pbase_save = -1;
++	priv->abase_save = -1;
++
+ 	priv->abase = ACPIBASE;
+-	priv->actrl = ACPICTRL;
++	priv->actrl_pbase = ACPICTRL_PMCBASE;
+ 
+ 	priv->gctrl_save = -1;
+ 	if (priv->chipset <= LPC_ICH5) {
+--- a/include/linux/mfd/lpc_ich.h
++++ b/include/linux/mfd/lpc_ich.h
+@@ -21,10 +21,10 @@
+ #define LPC_ICH_H
+ 
+ /* Watchdog resources */
+-#define ICH_RES_IO_TCO	0
+-#define ICH_RES_IO_SMI	1
+-#define ICH_RES_MEM_OFF	2
+-#define ICH_RES_MEM_GCS	0
++#define ICH_RES_IO_TCO		0
++#define ICH_RES_IO_SMI		1
++#define ICH_RES_MEM_OFF		2
++#define ICH_RES_MEM_GCS_PMC	0
+ 
+ /* GPIO resources */
+ #define ICH_RES_GPIO	0
diff --git a/patches.intel/mfd-lpc_ich-add-support-for-nm10-gpio.patch b/patches.intel/mfd-lpc_ich-add-support-for-nm10-gpio.patch
new file mode 100644
index 0000000000000..134f7587fd9bf
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-add-support-for-nm10-gpio.patch
@@ -0,0 +1,34 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:40:05 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:14 +0800
+Subject: [LTSI-dev]  [PATCH 09/16] mfd: lpc_ich: Add support for NM10 GPIO
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-10-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Peter Tyser <ptyser@xes-inc.com>
+
+The NM10's GPIO is compatible with ICH v7 GPIO.
+
+Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+Tested-by: Dan Weinlader <danw@vs-networks.com>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit 117bbfe25cfc2e968be1f7976ac460a5cd3d734e)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -305,6 +305,7 @@ static struct lpc_ich_info lpc_chipset_i
+ 	[LPC_NM10] = {
+ 		.name = "NM10",
+ 		.iTCO_version = 2,
++		.gpio_version = ICH_V7_GPIO,
+ 	},
+ 	[LPC_ICH8] = {
+ 		.name = "ICH8 or ICH8R",
diff --git a/patches.intel/mfd-lpc_ich-change-avoton-to-itco-v3.patch b/patches.intel/mfd-lpc_ich-change-avoton-to-itco-v3.patch
new file mode 100644
index 0000000000000..d5de655b273a5
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-change-avoton-to-itco-v3.patch
@@ -0,0 +1,36 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:40:01 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:13 +0800
+Subject: [LTSI-dev]  [PATCH 08/16] mfd: lpc_ich: Change Avoton to iTCO v3
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-9-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Peter Tyser <ptyser@xes-inc.com>
+
+The register layout of the Avoton is compatible with the iTCO v3
+register layout.
+
+Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+Tested-by: Rajat Jain <rajatjain@juniper.net>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit c48cf59878685cc06b71bb2a3ca17b61103c8de7)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -501,7 +501,7 @@ static struct lpc_ich_info lpc_chipset_i
+ 	},
+ 	[LPC_AVN] = {
+ 		.name = "Avoton SoC",
+-		.iTCO_version = 1,
++		.iTCO_version = 3,
+ 		.gpio_version = AVOTON_GPIO,
+ 	},
+ 	[LPC_COLETO] = {
diff --git a/patches.intel/mfd-lpc_ich-convert-ich-gpios-ids-to-enum.patch b/patches.intel/mfd-lpc_ich-convert-ich-gpios-ids-to-enum.patch
new file mode 100644
index 0000000000000..e93c9d35e07e8
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-convert-ich-gpios-ids-to-enum.patch
@@ -0,0 +1,47 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:37 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:07 +0800
+Subject: [LTSI-dev] [PATCH 02/16] mfd: lpc_ich: Convert ICH GPIOs IDs to enum
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-3-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Vincent Donnefort <vdonnefort@gmail.com>
+
+All those IDs are arbitrary and so can be encapsulated into an enumeration.
+
+Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit 6cec365e3eba3dd8c864056d8d3fd9e73ab8dd7a)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ include/linux/mfd/lpc_ich.h |   16 +++++++++-------
+ 1 file changed, 9 insertions(+), 7 deletions(-)
+
+--- a/include/linux/mfd/lpc_ich.h
++++ b/include/linux/mfd/lpc_ich.h
+@@ -31,13 +31,15 @@
+ #define ICH_RES_GPE0	1
+ 
+ /* GPIO compatibility */
+-#define ICH_I3100_GPIO		0x401
+-#define ICH_V5_GPIO		0x501
+-#define ICH_V6_GPIO		0x601
+-#define ICH_V7_GPIO		0x701
+-#define ICH_V9_GPIO		0x801
+-#define ICH_V10CORP_GPIO	0xa01
+-#define ICH_V10CONS_GPIO	0xa11
++enum {
++	ICH_I3100_GPIO,
++	ICH_V5_GPIO,
++	ICH_V6_GPIO,
++	ICH_V7_GPIO,
++	ICH_V9_GPIO,
++	ICH_V10CORP_GPIO,
++	ICH_V10CONS_GPIO,
++};
+ 
+ struct lpc_ich_info {
+ 	char name[32];
diff --git a/patches.intel/mfd-lpc_ich-fix-acpi-enable-bitmask.patch b/patches.intel/mfd-lpc_ich-fix-acpi-enable-bitmask.patch
new file mode 100644
index 0000000000000..bfd29dd3231bd
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-fix-acpi-enable-bitmask.patch
@@ -0,0 +1,37 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:45 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:09 +0800
+Subject: [LTSI-dev]  [PATCH 04/16] mfd: lpc_ich: Fix ACPI enable bitmask
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-5-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Peter Tyser <ptyser@xes-inc.com>
+
+The original bitmask of 0x10 was incorrect and would result in a write
+to a reserved read-only bit instead of enabling the ACPI I/O
+region.  Update it to the proper value of 0x80.
+
+Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+Tested-by: Rajat Jain <rajatjain@juniper.net>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit f5dccb15877b82a40950c6f752d5345c86189fc9)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -759,7 +759,7 @@ static void lpc_ich_enable_acpi_space(st
+ 	u8 reg_save;
+ 
+ 	pci_read_config_byte(dev, priv->acpi.ctrl, &reg_save);
+-	pci_write_config_byte(dev, priv->acpi.ctrl, reg_save | 0x10);
++	pci_write_config_byte(dev, priv->acpi.ctrl, reg_save | 0x80);
+ 	priv->acpi.save = reg_save;
+ }
+ 
diff --git a/patches.intel/mfd-lpc_ich-only-configure-watchdog-or-gpio-when-present.patch b/patches.intel/mfd-lpc_ich-only-configure-watchdog-or-gpio-when-present.patch
new file mode 100644
index 0000000000000..54455c8340c9b
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-only-configure-watchdog-or-gpio-when-present.patch
@@ -0,0 +1,54 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:48 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:10 +0800
+Subject: [LTSI-dev] [PATCH 05/16] mfd: lpc_ich: Only configure watchdog or GPIO when present
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-6-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Peter Tyser <ptyser@xes-inc.com>
+
+Some chipsets don't currently have GPIO support enabled.  For these
+chipsets don't go through the process of initializing the GPIO region.
+
+Make the same change for the watchdog initialization for chipsets which
+may not enable the WDT in the future.
+
+Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+Tested-by: Rajat Jain <rajatjain@juniper.net>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit f0776b8ce03ceb638c51b62f324844c71c446600)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c |   16 ++++++++++------
+ 1 file changed, 10 insertions(+), 6 deletions(-)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -967,13 +967,17 @@ static int lpc_ich_probe(struct pci_dev
+ 
+ 	pci_set_drvdata(dev, priv);
+ 
+-	ret = lpc_ich_init_wdt(dev);
+-	if (!ret)
+-		cell_added = true;
++	if (lpc_chipset_info[priv->chipset].iTCO_version) {
++		ret = lpc_ich_init_wdt(dev);
++		if (!ret)
++			cell_added = true;
++	}
+ 
+-	ret = lpc_ich_init_gpio(dev);
+-	if (!ret)
+-		cell_added = true;
++	if (lpc_chipset_info[priv->chipset].gpio_version) {
++		ret = lpc_ich_init_gpio(dev);
++		if (!ret)
++			cell_added = true;
++	}
+ 
+ 	/*
+ 	 * We only care if at least one or none of the cells registered
diff --git a/patches.intel/mfd-lpc_ich-remove-lpc_ich_cfg-struct-use.patch b/patches.intel/mfd-lpc_ich-remove-lpc_ich_cfg-struct-use.patch
new file mode 100644
index 0000000000000..19beed4cf9f52
--- /dev/null
+++ b/patches.intel/mfd-lpc_ich-remove-lpc_ich_cfg-struct-use.patch
@@ -0,0 +1,156 @@
+From ltsi-dev-bounces@lists.linuxfoundation.org Wed Nov  5 10:39:53 2014
+From: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Date: Wed,  5 Nov 2014 09:39:11 +0800
+Subject: [LTSI-dev] [PATCH 06/16] mfd: lpc_ich: Remove lpc_ich_cfg struct use
+To: LTSI Mailing List <ltsi-dev@lists.linuxfoundation.org>
+Cc: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+Message-ID: <1415151561-16047-7-git-send-email-rebecca.swee.fun.chang@intel.com>
+
+
+From: Peter Tyser <ptyser@xes-inc.com>
+
+Future chipsets will use different register layouts that don't map
+cleanly to the lpc_ich_cfg fields.  Remove the lpc_ich_cfg struct and
+add explicit fields to the higher level lpc_ich_priv structure.
+
+This change should have no functional impact.
+
+Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+Tested-by: Rajat Jain <rajatjain@juniper.net>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+(cherry picked from commit 429b941abd503c8936e116c819362323aafdbd50)
+
+Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
+---
+ drivers/mfd/lpc_ich.c |   63 +++++++++++++++++++++++++-------------------------
+ 1 file changed, 32 insertions(+), 31 deletions(-)
+
+--- a/drivers/mfd/lpc_ich.c
++++ b/drivers/mfd/lpc_ich.c
+@@ -89,16 +89,16 @@
+ #define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i)
+ #define wdt_res(b, i) (&wdt_ich_res[(b) + (i)])
+ 
+-struct lpc_ich_cfg {
+-	int base;
+-	int ctrl;
+-	int save;
+-};
+-
+ struct lpc_ich_priv {
+ 	int chipset;
+-	struct lpc_ich_cfg acpi;
+-	struct lpc_ich_cfg gpio;
++
++	int abase;		/* ACPI base */
++	int actrl;		/* ACPI control or PMC base */
++	int gbase;		/* GPIO base */
++	int gctrl;		/* GPIO control */
++
++	int actrl_save;		/* Cached ACPI control base value */
++	int gctrl_save;		/* Cached GPIO control value */
+ };
+ 
+ static struct resource wdt_ich_res[] = {
+@@ -742,14 +742,14 @@ static void lpc_ich_restore_config_space
+ {
+ 	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+ 
+-	if (priv->acpi.save >= 0) {
+-		pci_write_config_byte(dev, priv->acpi.ctrl, priv->acpi.save);
+-		priv->acpi.save = -1;
++	if (priv->actrl_save >= 0) {
++		pci_write_config_byte(dev, priv->actrl, priv->actrl_save);
++		priv->actrl_save = -1;
+ 	}
+ 
+-	if (priv->gpio.save >= 0) {
+-		pci_write_config_byte(dev, priv->gpio.ctrl, priv->gpio.save);
+-		priv->gpio.save = -1;
++	if (priv->gctrl_save >= 0) {
++		pci_write_config_byte(dev, priv->gctrl, priv->gctrl_save);
++		priv->gctrl_save = -1;
+ 	}
+ }
+ 
+@@ -758,9 +758,9 @@ static void lpc_ich_enable_acpi_space(st
+ 	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+ 	u8 reg_save;
+ 
+-	pci_read_config_byte(dev, priv->acpi.ctrl, &reg_save);
+-	pci_write_config_byte(dev, priv->acpi.ctrl, reg_save | 0x80);
+-	priv->acpi.save = reg_save;
++	pci_read_config_byte(dev, priv->actrl, &reg_save);
++	pci_write_config_byte(dev, priv->actrl, reg_save | 0x80);
++	priv->actrl_save = reg_save;
+ }
+ 
+ static void lpc_ich_enable_gpio_space(struct pci_dev *dev)
+@@ -768,9 +768,9 @@ static void lpc_ich_enable_gpio_space(st
+ 	struct lpc_ich_priv *priv = pci_get_drvdata(dev);
+ 	u8 reg_save;
+ 
+-	pci_read_config_byte(dev, priv->gpio.ctrl, &reg_save);
+-	pci_write_config_byte(dev, priv->gpio.ctrl, reg_save | 0x10);
+-	priv->gpio.save = reg_save;
++	pci_read_config_byte(dev, priv->gctrl, &reg_save);
++	pci_write_config_byte(dev, priv->gctrl, reg_save | 0x10);
++	priv->gctrl_save = reg_save;
+ }
+ 
+ static void lpc_ich_finalize_cell(struct pci_dev *dev, struct mfd_cell *cell)
+@@ -815,7 +815,7 @@ static int lpc_ich_init_gpio(struct pci_
+ 	struct resource *res;
+ 
+ 	/* Setup power management base register */
+-	pci_read_config_dword(dev, priv->acpi.base, &base_addr_cfg);
++	pci_read_config_dword(dev, priv->abase, &base_addr_cfg);
+ 	base_addr = base_addr_cfg & 0x0000ff80;
+ 	if (!base_addr) {
+ 		dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n");
+@@ -841,7 +841,7 @@ static int lpc_ich_init_gpio(struct pci_
+ 
+ gpe0_done:
+ 	/* Setup GPIO base register */
+-	pci_read_config_dword(dev, priv->gpio.base, &base_addr_cfg);
++	pci_read_config_dword(dev, priv->gbase, &base_addr_cfg);
+ 	base_addr = base_addr_cfg & 0x0000ff80;
+ 	if (!base_addr) {
+ 		dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n");
+@@ -891,7 +891,7 @@ static int lpc_ich_init_wdt(struct pci_d
+ 	struct resource *res;
+ 
+ 	/* Setup power management base register */
+-	pci_read_config_dword(dev, priv->acpi.base, &base_addr_cfg);
++	pci_read_config_dword(dev, priv->abase, &base_addr_cfg);
+ 	base_addr = base_addr_cfg & 0x0000ff80;
+ 	if (!base_addr) {
+ 		dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n");
+@@ -952,17 +952,18 @@ static int lpc_ich_probe(struct pci_dev
+ 		return -ENOMEM;
+ 
+ 	priv->chipset = id->driver_data;
+-	priv->acpi.save = -1;
+-	priv->acpi.base = ACPIBASE;
+-	priv->acpi.ctrl = ACPICTRL;
+ 
+-	priv->gpio.save = -1;
++	priv->actrl_save = -1;
++	priv->abase = ACPIBASE;
++	priv->actrl = ACPICTRL;
++
++	priv->gctrl_save = -1;
+ 	if (priv->chipset <= LPC_ICH5) {
+-		priv->gpio.base = GPIOBASE_ICH0;
+-		priv->gpio.ctrl = GPIOCTRL_ICH0;
++		priv->gbase = GPIOBASE_ICH0;
++		priv->gctrl = GPIOCTRL_ICH0;
+ 	} else {
+-		priv->gpio.base = GPIOBASE_ICH6;
+-		priv->gpio.ctrl = GPIOCTRL_ICH6;
++		priv->gbase = GPIOBASE_ICH6;
++		priv->gctrl = GPIOCTRL_ICH6;
+ 	}
+ 
+ 	pci_set_drvdata(dev, priv);
diff --git a/series b/series
index e3802ff187d10..49823bce622a9 100644
--- a/series
+++ b/series
@@ -1031,6 +1031,15 @@ patches.intel/i2c-remove-define_pci_device_table-macro.patch
 patches.intel/i2c-i801-fix-the-alignment-of-the-device-table.patch
 patches.intel/i2c-i801-add-device-id-for-intel-wildcat-point-pch.patch
 patches.intel/i2c-i801-add-pci-id-for-intel-braswell.patch
+patches.intel/mfd-delete-non-required-instances-of-include-linux-init.h.patch
+patches.intel/mfd-lpc_ich-convert-ich-gpios-ids-to-enum.patch
+patches.intel/mfd-lpc_ich-add-support-for-intel-avoton-gpios.patch
+patches.intel/mfd-lpc_ich-fix-acpi-enable-bitmask.patch
+patches.intel/mfd-lpc_ich-only-configure-watchdog-or-gpio-when-present.patch
+patches.intel/mfd-lpc_ich-remove-lpc_ich_cfg-struct-use.patch
+patches.intel/mfd-lpc_ich-add-support-for-itco-v3.patch
+patches.intel/mfd-lpc_ich-change-avoton-to-itco-v3.patch
+patches.intel/mfd-lpc_ich-add-support-for-nm10-gpio.patch
 
 
 #############################################################################