diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json | 129 |
1 files changed, 5 insertions, 124 deletions
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json index 403fb2b87fc4d3..a29ed35227794c 100644 --- a/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/pipeline.json @@ -1,7 +1,6 @@ [ { "BriefDescription": "Cycles the divider is busy", - "Counter": "0,1,2,3", "EventCode": "0x14", "EventName": "ARITH.CYCLES_DIV_BUSY", "SampleAfterValue": "2000000", @@ -9,7 +8,6 @@ }, { "BriefDescription": "Divide Operations executed", - "Counter": "0,1,2,3", "CounterMask": "1", "EdgeDetect": "1", "EventCode": "0x14", @@ -20,7 +18,6 @@ }, { "BriefDescription": "Multiply operations executed", - "Counter": "0,1,2,3", "EventCode": "0x14", "EventName": "ARITH.MUL", "SampleAfterValue": "2000000", @@ -28,7 +25,6 @@ }, { "BriefDescription": "BACLEAR asserted with bad target address", - "Counter": "0,1,2,3", "EventCode": "0xE6", "EventName": "BACLEAR.BAD_TARGET", "SampleAfterValue": "2000000", @@ -36,7 +32,6 @@ }, { "BriefDescription": "BACLEAR asserted, regardless of cause", - "Counter": "0,1,2,3", "EventCode": "0xE6", "EventName": "BACLEAR.CLEAR", "SampleAfterValue": "2000000", @@ -44,7 +39,6 @@ }, { "BriefDescription": "Instruction queue forced BACLEAR", - "Counter": "0,1,2,3", "EventCode": "0xA7", "EventName": "BACLEAR_FORCE_IQ", "SampleAfterValue": "2000000", @@ -52,7 +46,6 @@ }, { "BriefDescription": "Early Branch Prediciton Unit clears", - "Counter": "0,1,2,3", "EventCode": "0xE8", "EventName": "BPU_CLEARS.EARLY", "SampleAfterValue": "2000000", @@ -60,7 +53,6 @@ }, { "BriefDescription": "Late Branch Prediction Unit clears", - "Counter": "0,1,2,3", "EventCode": "0xE8", "EventName": "BPU_CLEARS.LATE", "SampleAfterValue": "2000000", @@ -68,7 +60,6 @@ }, { "BriefDescription": "Branch prediction unit missed call or return", - "Counter": "0,1,2,3", "EventCode": "0xE5", "EventName": "BPU_MISSED_CALL_RET", "SampleAfterValue": "2000000", @@ -76,7 +67,6 @@ }, { "BriefDescription": "Branch instructions decoded", - "Counter": "0,1,2,3", "EventCode": "0xE0", "EventName": "BR_INST_DECODED", "SampleAfterValue": "2000000", @@ -84,7 +74,6 @@ }, { "BriefDescription": "Branch instructions executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.ANY", "SampleAfterValue": "200000", @@ -92,7 +81,6 @@ }, { "BriefDescription": "Conditional branch instructions executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.COND", "SampleAfterValue": "200000", @@ -100,7 +88,6 @@ }, { "BriefDescription": "Unconditional branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.DIRECT", "SampleAfterValue": "200000", @@ -108,7 +95,6 @@ }, { "BriefDescription": "Unconditional call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.DIRECT_NEAR_CALL", "SampleAfterValue": "20000", @@ -116,7 +102,6 @@ }, { "BriefDescription": "Indirect call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.INDIRECT_NEAR_CALL", "SampleAfterValue": "20000", @@ -124,7 +109,6 @@ }, { "BriefDescription": "Indirect non call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.INDIRECT_NON_CALL", "SampleAfterValue": "20000", @@ -132,7 +116,6 @@ }, { "BriefDescription": "Call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.NEAR_CALLS", "SampleAfterValue": "20000", @@ -140,7 +123,6 @@ }, { "BriefDescription": "All non call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.NON_CALLS", "SampleAfterValue": "200000", @@ -148,7 +130,6 @@ }, { "BriefDescription": "Indirect return branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.RETURN_NEAR", "SampleAfterValue": "20000", @@ -156,7 +137,6 @@ }, { "BriefDescription": "Taken branches executed", - "Counter": "0,1,2,3", "EventCode": "0x88", "EventName": "BR_INST_EXEC.TAKEN", "SampleAfterValue": "200000", @@ -164,7 +144,6 @@ }, { "BriefDescription": "Retired branch instructions (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.ALL_BRANCHES", "PEBS": "1", @@ -173,7 +152,6 @@ }, { "BriefDescription": "Retired conditional branch instructions (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.CONDITIONAL", "PEBS": "1", @@ -182,7 +160,6 @@ }, { "BriefDescription": "Retired near call instructions (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.NEAR_CALL", "PEBS": "1", @@ -191,7 +168,6 @@ }, { "BriefDescription": "Mispredicted branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.ANY", "SampleAfterValue": "20000", @@ -199,7 +175,6 @@ }, { "BriefDescription": "Mispredicted conditional branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.COND", "SampleAfterValue": "20000", @@ -207,7 +182,6 @@ }, { "BriefDescription": "Mispredicted unconditional branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.DIRECT", "SampleAfterValue": "20000", @@ -215,7 +189,6 @@ }, { "BriefDescription": "Mispredicted non call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.DIRECT_NEAR_CALL", "SampleAfterValue": "2000", @@ -223,7 +196,6 @@ }, { "BriefDescription": "Mispredicted indirect call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.INDIRECT_NEAR_CALL", "SampleAfterValue": "2000", @@ -231,7 +203,6 @@ }, { "BriefDescription": "Mispredicted indirect non call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.INDIRECT_NON_CALL", "SampleAfterValue": "2000", @@ -239,7 +210,6 @@ }, { "BriefDescription": "Mispredicted call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.NEAR_CALLS", "SampleAfterValue": "2000", @@ -247,7 +217,6 @@ }, { "BriefDescription": "Mispredicted non call branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.NON_CALLS", "SampleAfterValue": "20000", @@ -255,7 +224,6 @@ }, { "BriefDescription": "Mispredicted return branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.RETURN_NEAR", "SampleAfterValue": "2000", @@ -263,7 +231,6 @@ }, { "BriefDescription": "Mispredicted taken branches executed", - "Counter": "0,1,2,3", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.TAKEN", "SampleAfterValue": "20000", @@ -271,7 +238,6 @@ }, { "BriefDescription": "Mispredicted retired branch instructions (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC5", "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", "PEBS": "1", @@ -280,7 +246,6 @@ }, { "BriefDescription": "Mispredicted conditional retired branches (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC5", "EventName": "BR_MISP_RETIRED.CONDITIONAL", "PEBS": "1", @@ -289,7 +254,6 @@ }, { "BriefDescription": "Mispredicted near retired calls (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC5", "EventName": "BR_MISP_RETIRED.NEAR_CALL", "PEBS": "1", @@ -298,15 +262,11 @@ }, { "BriefDescription": "Reference cycles when thread is not halted (fixed counter)", - "Counter": "Fixed counter 3", - "EventCode": "0x0", "EventName": "CPU_CLK_UNHALTED.REF", - "SampleAfterValue": "2000000", - "UMask": "0x0" + "SampleAfterValue": "2000000" }, { "BriefDescription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)", - "Counter": "0,1,2,3", "EventCode": "0x3C", "EventName": "CPU_CLK_UNHALTED.REF_P", "SampleAfterValue": "100000", @@ -314,33 +274,25 @@ }, { "BriefDescription": "Cycles when thread is not halted (fixed counter)", - "Counter": "Fixed counter 2", - "EventCode": "0x0", "EventName": "CPU_CLK_UNHALTED.THREAD", - "SampleAfterValue": "2000000", - "UMask": "0x0" + "SampleAfterValue": "2000000" }, { "BriefDescription": "Cycles when thread is not halted (programmable counter)", - "Counter": "0,1,2,3", "EventCode": "0x3C", "EventName": "CPU_CLK_UNHALTED.THREAD_P", - "SampleAfterValue": "2000000", - "UMask": "0x0" + "SampleAfterValue": "2000000" }, { "BriefDescription": "Total CPU cycles", - "Counter": "0,1,2,3", "CounterMask": "2", "EventCode": "0x3C", "EventName": "CPU_CLK_UNHALTED.TOTAL_CYCLES", "Invert": "1", - "SampleAfterValue": "2000000", - "UMask": "0x0" + "SampleAfterValue": "2000000" }, { "BriefDescription": "Any Instruction Length Decoder stall cycles", - "Counter": "0,1,2,3", "EventCode": "0x87", "EventName": "ILD_STALL.ANY", "SampleAfterValue": "2000000", @@ -348,7 +300,6 @@ }, { "BriefDescription": "Instruction Queue full stall cycles", - "Counter": "0,1,2,3", "EventCode": "0x87", "EventName": "ILD_STALL.IQ_FULL", "SampleAfterValue": "2000000", @@ -356,7 +307,6 @@ }, { "BriefDescription": "Length Change Prefix stall cycles", - "Counter": "0,1,2,3", "EventCode": "0x87", "EventName": "ILD_STALL.LCP", "SampleAfterValue": "2000000", @@ -364,7 +314,6 @@ }, { "BriefDescription": "Stall cycles due to BPU MRU bypass", - "Counter": "0,1,2,3", "EventCode": "0x87", "EventName": "ILD_STALL.MRU", "SampleAfterValue": "2000000", @@ -372,7 +321,6 @@ }, { "BriefDescription": "Regen stall cycles", - "Counter": "0,1,2,3", "EventCode": "0x87", "EventName": "ILD_STALL.REGEN", "SampleAfterValue": "2000000", @@ -380,7 +328,6 @@ }, { "BriefDescription": "Instructions that must be decoded by decoder 0", - "Counter": "0,1,2,3", "EventCode": "0x18", "EventName": "INST_DECODED.DEC0", "SampleAfterValue": "2000000", @@ -388,7 +335,6 @@ }, { "BriefDescription": "Instructions written to instruction queue.", - "Counter": "0,1,2,3", "EventCode": "0x17", "EventName": "INST_QUEUE_WRITES", "SampleAfterValue": "2000000", @@ -396,7 +342,6 @@ }, { "BriefDescription": "Cycles instructions are written to the instruction queue", - "Counter": "0,1,2,3", "EventCode": "0x1E", "EventName": "INST_QUEUE_WRITE_CYCLES", "SampleAfterValue": "2000000", @@ -404,15 +349,11 @@ }, { "BriefDescription": "Instructions retired (fixed counter)", - "Counter": "Fixed counter 1", - "EventCode": "0x0", "EventName": "INST_RETIRED.ANY", - "SampleAfterValue": "2000000", - "UMask": "0x0" + "SampleAfterValue": "2000000" }, { "BriefDescription": "Instructions retired (Programmable counter and Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC0", "EventName": "INST_RETIRED.ANY_P", "PEBS": "1", @@ -421,7 +362,6 @@ }, { "BriefDescription": "Retired MMX instructions (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC0", "EventName": "INST_RETIRED.MMX", "PEBS": "1", @@ -430,7 +370,6 @@ }, { "BriefDescription": "Total cycles (Precise Event)", - "Counter": "0,1,2,3", "CounterMask": "16", "EventCode": "0xC0", "EventName": "INST_RETIRED.TOTAL_CYCLES", @@ -441,7 +380,6 @@ }, { "BriefDescription": "Total cycles (Precise Event)", - "Counter": "0,1,2,3", "CounterMask": "16", "EventCode": "0xC0", "EventName": "INST_RETIRED.TOTAL_CYCLES_PS", @@ -452,7 +390,6 @@ }, { "BriefDescription": "Retired floating-point operations (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC0", "EventName": "INST_RETIRED.X87", "PEBS": "1", @@ -461,7 +398,6 @@ }, { "BriefDescription": "Load operations conflicting with software prefetches", - "Counter": "0,1", "EventCode": "0x4C", "EventName": "LOAD_HIT_PRE", "SampleAfterValue": "200000", @@ -469,7 +405,6 @@ }, { "BriefDescription": "Cycles when uops were delivered by the LSD", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xA8", "EventName": "LSD.ACTIVE", @@ -478,7 +413,6 @@ }, { "BriefDescription": "Cycles no uops were delivered by the LSD", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xA8", "EventName": "LSD.INACTIVE", @@ -488,7 +422,6 @@ }, { "BriefDescription": "Loops that can't stream from the instruction queue", - "Counter": "0,1,2,3", "EventCode": "0x20", "EventName": "LSD_OVERFLOW", "SampleAfterValue": "2000000", @@ -496,7 +429,6 @@ }, { "BriefDescription": "Cycles machine clear asserted", - "Counter": "0,1,2,3", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.CYCLES", "SampleAfterValue": "20000", @@ -504,7 +436,6 @@ }, { "BriefDescription": "Execution pipeline restart due to Memory ordering conflicts", - "Counter": "0,1,2,3", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.MEM_ORDER", "SampleAfterValue": "20000", @@ -512,7 +443,6 @@ }, { "BriefDescription": "Self-Modifying Code detected", - "Counter": "0,1,2,3", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.SMC", "SampleAfterValue": "20000", @@ -520,7 +450,6 @@ }, { "BriefDescription": "All RAT stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xD2", "EventName": "RAT_STALLS.ANY", "SampleAfterValue": "2000000", @@ -528,7 +457,6 @@ }, { "BriefDescription": "Flag stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xD2", "EventName": "RAT_STALLS.FLAGS", "SampleAfterValue": "2000000", @@ -536,7 +464,6 @@ }, { "BriefDescription": "Partial register stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xD2", "EventName": "RAT_STALLS.REGISTERS", "SampleAfterValue": "2000000", @@ -544,7 +471,6 @@ }, { "BriefDescription": "ROB read port stalls cycles", - "Counter": "0,1,2,3", "EventCode": "0xD2", "EventName": "RAT_STALLS.ROB_READ_PORT", "SampleAfterValue": "2000000", @@ -552,7 +478,6 @@ }, { "BriefDescription": "Scoreboard stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xD2", "EventName": "RAT_STALLS.SCOREBOARD", "SampleAfterValue": "2000000", @@ -560,7 +485,6 @@ }, { "BriefDescription": "Resource related stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.ANY", "SampleAfterValue": "2000000", @@ -568,7 +492,6 @@ }, { "BriefDescription": "FPU control word write stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.FPCW", "SampleAfterValue": "2000000", @@ -576,7 +499,6 @@ }, { "BriefDescription": "Load buffer stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.LOAD", "SampleAfterValue": "2000000", @@ -584,7 +506,6 @@ }, { "BriefDescription": "MXCSR rename stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.MXCSR", "SampleAfterValue": "2000000", @@ -592,7 +513,6 @@ }, { "BriefDescription": "Other Resource related stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.OTHER", "SampleAfterValue": "2000000", @@ -600,7 +520,6 @@ }, { "BriefDescription": "ROB full stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.ROB_FULL", "SampleAfterValue": "2000000", @@ -608,7 +527,6 @@ }, { "BriefDescription": "Reservation Station full stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.RS_FULL", "SampleAfterValue": "2000000", @@ -616,7 +534,6 @@ }, { "BriefDescription": "Store buffer stall cycles", - "Counter": "0,1,2,3", "EventCode": "0xA2", "EventName": "RESOURCE_STALLS.STORE", "SampleAfterValue": "2000000", @@ -624,7 +541,6 @@ }, { "BriefDescription": "SIMD Packed-Double Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC7", "EventName": "SSEX_UOPS_RETIRED.PACKED_DOUBLE", "PEBS": "1", @@ -633,7 +549,6 @@ }, { "BriefDescription": "SIMD Packed-Single Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC7", "EventName": "SSEX_UOPS_RETIRED.PACKED_SINGLE", "PEBS": "1", @@ -642,7 +557,6 @@ }, { "BriefDescription": "SIMD Scalar-Double Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC7", "EventName": "SSEX_UOPS_RETIRED.SCALAR_DOUBLE", "PEBS": "1", @@ -651,7 +565,6 @@ }, { "BriefDescription": "SIMD Scalar-Single Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC7", "EventName": "SSEX_UOPS_RETIRED.SCALAR_SINGLE", "PEBS": "1", @@ -660,7 +573,6 @@ }, { "BriefDescription": "SIMD Vector Integer Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC7", "EventName": "SSEX_UOPS_RETIRED.VECTOR_INTEGER", "PEBS": "1", @@ -669,7 +581,6 @@ }, { "BriefDescription": "Stack pointer instructions decoded", - "Counter": "0,1,2,3", "EventCode": "0xD1", "EventName": "UOPS_DECODED.ESP_FOLDING", "SampleAfterValue": "2000000", @@ -677,7 +588,6 @@ }, { "BriefDescription": "Stack pointer sync operations", - "Counter": "0,1,2,3", "EventCode": "0xD1", "EventName": "UOPS_DECODED.ESP_SYNC", "SampleAfterValue": "2000000", @@ -685,7 +595,6 @@ }, { "BriefDescription": "Uops decoded by Microcode Sequencer", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xD1", "EventName": "UOPS_DECODED.MS_CYCLES_ACTIVE", @@ -694,7 +603,6 @@ }, { "BriefDescription": "Cycles no Uops are decoded", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xD1", "EventName": "UOPS_DECODED.STALL_CYCLES", @@ -705,7 +613,6 @@ { "AnyThread": "1", "BriefDescription": "Cycles Uops executed on any port (core count)", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES", @@ -715,7 +622,6 @@ { "AnyThread": "1", "BriefDescription": "Cycles Uops executed on ports 0-4 (core count)", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", @@ -725,7 +631,6 @@ { "AnyThread": "1", "BriefDescription": "Uops executed on any port (core count)", - "Counter": "0,1,2,3", "CounterMask": "1", "EdgeDetect": "1", "EventCode": "0xB1", @@ -737,7 +642,6 @@ { "AnyThread": "1", "BriefDescription": "Uops executed on ports 0-4 (core count)", - "Counter": "0,1,2,3", "CounterMask": "1", "EdgeDetect": "1", "EventCode": "0xB1", @@ -749,7 +653,6 @@ { "AnyThread": "1", "BriefDescription": "Cycles no Uops issued on any port (core count)", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES", @@ -760,7 +663,6 @@ { "AnyThread": "1", "BriefDescription": "Cycles no Uops issued on ports 0-4 (core count)", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES_NO_PORT5", @@ -770,7 +672,6 @@ }, { "BriefDescription": "Uops executed on port 0", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT0", "SampleAfterValue": "2000000", @@ -778,7 +679,6 @@ }, { "BriefDescription": "Uops issued on ports 0, 1 or 5", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT015", "SampleAfterValue": "2000000", @@ -786,7 +686,6 @@ }, { "BriefDescription": "Cycles no Uops issued on ports 0, 1 or 5", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT015_STALL_CYCLES", @@ -796,7 +695,6 @@ }, { "BriefDescription": "Uops executed on port 1", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT1", "SampleAfterValue": "2000000", @@ -805,7 +703,6 @@ { "AnyThread": "1", "BriefDescription": "Uops issued on ports 2, 3 or 4", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT234_CORE", "SampleAfterValue": "2000000", @@ -814,7 +711,6 @@ { "AnyThread": "1", "BriefDescription": "Uops executed on port 2 (core count)", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT2_CORE", "SampleAfterValue": "2000000", @@ -823,7 +719,6 @@ { "AnyThread": "1", "BriefDescription": "Uops executed on port 3 (core count)", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT3_CORE", "SampleAfterValue": "2000000", @@ -832,7 +727,6 @@ { "AnyThread": "1", "BriefDescription": "Uops executed on port 4 (core count)", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT4_CORE", "SampleAfterValue": "2000000", @@ -840,7 +734,6 @@ }, { "BriefDescription": "Uops executed on port 5", - "Counter": "0,1,2,3", "EventCode": "0xB1", "EventName": "UOPS_EXECUTED.PORT5", "SampleAfterValue": "2000000", @@ -848,7 +741,6 @@ }, { "BriefDescription": "Uops issued", - "Counter": "0,1,2,3", "EventCode": "0xE", "EventName": "UOPS_ISSUED.ANY", "SampleAfterValue": "2000000", @@ -857,7 +749,6 @@ { "AnyThread": "1", "BriefDescription": "Cycles no Uops were issued on any thread", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xE", "EventName": "UOPS_ISSUED.CORE_STALL_CYCLES", @@ -868,7 +759,6 @@ { "AnyThread": "1", "BriefDescription": "Cycles Uops were issued on either thread", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xE", "EventName": "UOPS_ISSUED.CYCLES_ALL_THREADS", @@ -877,7 +767,6 @@ }, { "BriefDescription": "Fused Uops issued", - "Counter": "0,1,2,3", "EventCode": "0xE", "EventName": "UOPS_ISSUED.FUSED", "SampleAfterValue": "2000000", @@ -885,7 +774,6 @@ }, { "BriefDescription": "Cycles no Uops were issued", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xE", "EventName": "UOPS_ISSUED.STALL_CYCLES", @@ -895,7 +783,6 @@ }, { "BriefDescription": "Cycles Uops are being retired", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.ACTIVE_CYCLES", @@ -905,7 +792,6 @@ }, { "BriefDescription": "Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.ANY", "PEBS": "1", @@ -914,7 +800,6 @@ }, { "BriefDescription": "Macro-fused Uops retired (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.MACRO_FUSED", "PEBS": "1", @@ -923,7 +808,6 @@ }, { "BriefDescription": "Retirement slots used (Precise Event)", - "Counter": "0,1,2,3", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.RETIRE_SLOTS", "PEBS": "1", @@ -932,7 +816,6 @@ }, { "BriefDescription": "Cycles Uops are not retiring (Precise Event)", - "Counter": "0,1,2,3", "CounterMask": "1", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.STALL_CYCLES", @@ -943,7 +826,6 @@ }, { "BriefDescription": "Total cycles using precise uop retired event (Precise Event)", - "Counter": "0,1,2,3", "CounterMask": "16", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.TOTAL_CYCLES", @@ -954,7 +836,6 @@ }, { "BriefDescription": "Uop unfusions due to FP exceptions", - "Counter": "0,1,2,3", "EventCode": "0xDB", "EventName": "UOP_UNFUSION", "SampleAfterValue": "2000000", |