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author | Arnd Bergmann <arnd@arndb.de> | 2022-09-23 17:45:13 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2022-09-23 17:45:14 +0200 |
commit | 2653853e2a2a21a9b87d976044863cf776035b8e (patch) | |
tree | ff5549db9e58c8c0237777c123baba0a0f29371a | |
parent | c69badd1d74690e5b5b4d5c3c254a1e64bcc1ac9 (diff) | |
parent | ae358d71d4623ed0a466a7498f8ce25c7fda22d1 (diff) | |
download | linux-2653853e2a2a21a9b87d976044863cf776035b8e.tar.gz |
Merge tag 'reset-fixes-for-v6.0' of git://git.pengutronix.de/pza/linux into arm/fixes
Reset controller fixes for v6.0
Fix the i.MX8MP PCIe PHY PERST bit polarity, issue the Sparx5 "switch"
reset (which turned out to be a rather more global reset) early on
startup, stubbing out the reset controller driver, and fix the NPCM8XX
USB reset sequence by setting IPSRST4 bits in the correct register.
* tag 'reset-fixes-for-v6.0' of git://git.pengutronix.de/pza/linux:
reset: npcm: fix iprst2 and iprst4 setting
reset: microchip-sparx5: issue a reset on startup
reset: imx7: Fix the iMX8MP PCIe PHY PERST support
Link: https://lore.kernel.org/r/20220923143519.41735-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | drivers/reset/reset-imx7.c | 1 | ||||
-rw-r--r-- | drivers/reset/reset-microchip-sparx5.c | 22 | ||||
-rw-r--r-- | drivers/reset/reset-npcm.c | 2 |
3 files changed, 19 insertions, 6 deletions
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index 185a333df66c55..d2408725eb2c3c 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct reset_controller_dev *rcdev, break; case IMX8MP_RESET_PCIE_CTRL_APPS_EN: + case IMX8MP_RESET_PCIEPHY_PERST: value = assert ? 0 : bit; break; } diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 00b612a0effa11..f3528dd1d084ea 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -33,11 +33,8 @@ static struct regmap_config sparx5_reset_regmap_config = { .reg_stride = 4, }; -static int sparx5_switch_reset(struct reset_controller_dev *rcdev, - unsigned long id) +static int sparx5_switch_reset(struct mchp_reset_context *ctx) { - struct mchp_reset_context *ctx = - container_of(rcdev, struct mchp_reset_context, rcdev); u32 val; /* Make sure the core is PROTECTED from reset */ @@ -54,8 +51,14 @@ static int sparx5_switch_reset(struct reset_controller_dev *rcdev, 1, 100); } +static int sparx5_reset_noop(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return 0; +} + static const struct reset_control_ops sparx5_reset_ops = { - .reset = sparx5_switch_reset, + .reset = sparx5_reset_noop, }; static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name, @@ -122,6 +125,11 @@ static int mchp_sparx5_reset_probe(struct platform_device *pdev) ctx->rcdev.of_node = dn; ctx->props = device_get_match_data(&pdev->dev); + /* Issue the reset very early, our actual reset callback is a noop. */ + err = sparx5_switch_reset(ctx); + if (err) + return err; + return devm_reset_controller_register(&pdev->dev, &ctx->rcdev); } @@ -163,6 +171,10 @@ static int __init mchp_sparx5_reset_init(void) return platform_driver_register(&mchp_sparx5_reset_driver); } +/* + * Because this is a global reset, keep this postcore_initcall() to issue the + * reset as early as possible during the kernel startup. + */ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); diff --git a/drivers/reset/reset-npcm.c b/drivers/reset/reset-npcm.c index 24c55efa98e556..f2333506b0a670 100644 --- a/drivers/reset/reset-npcm.c +++ b/drivers/reset/reset-npcm.c @@ -291,7 +291,7 @@ static void npcm_usb_reset_npcm8xx(struct npcm_rc_data *rc) iprst2 |= ipsrst2_bits; iprst3 |= (ipsrst3_bits | NPCM_IPSRST3_USBPHY1 | NPCM_IPSRST3_USBPHY2); - iprst2 |= ipsrst4_bits; + iprst4 |= ipsrst4_bits; writel(iprst1, rc->base + NPCM_IPSRST1); writel(iprst2, rc->base + NPCM_IPSRST2); |