32 patches

added patches:
	mxc-pwm-should-active-during-doze-wait-dbg-mode.patch
	scsi-mpt2sas-_scsih_smart_predicted_fault-uses-gfp_kernel-in-interrupt-context.patch

3 files changed, 73 insertions, 0 deletions

diff --git a/queue-2.6.32/mxc-pwm-should-active-during-doze-wait-dbg-mode.patch b/queue-2.6.32/mxc-pwm-should-active-during-doze-wait-dbg-mode.patch
new file mode 100644
index 0000000..4b37efc
--- /dev/null
+++ b/queue-2.6.32/mxc-pwm-should-active-during-doze-wait-dbg-mode.patch
@@ -0,0 +1,40 @@
+From c0d96aed8c6dd925afe9ea35491a0cd458642a86 Mon Sep 17 00:00:00 2001
+From: Jason Chen <jason.chen@linaro.org>
+Date: Wed, 30 Nov 2011 11:34:27 +0800
+Subject: MXC PWM: should active during DOZE/WAIT/DBG mode
+
+From: Jason Chen <jason.chen@linaro.org>
+
+commit c0d96aed8c6dd925afe9ea35491a0cd458642a86 upstream.
+
+Signed-off-by: Jason Chen <jason.chen@linaro.org>
+Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/arm/plat-mxc/pwm.c |    7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/plat-mxc/pwm.c
++++ b/arch/arm/plat-mxc/pwm.c
+@@ -31,6 +31,9 @@
+ #define MX3_PWMSAR                0x0C    /* PWM Sample Register */
+ #define MX3_PWMPR                 0x10    /* PWM Period Register */
+ #define MX3_PWMCR_PRESCALER(x)    (((x - 1) & 0xFFF) << 4)
++#define MX3_PWMCR_DOZEEN                (1 << 24)
++#define MX3_PWMCR_WAITEN                (1 << 23)
++#define MX3_PWMCR_DBGEN			(1 << 22)
+ #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
+ #define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
+ #define MX3_PWMCR_EN              (1 << 0)
+@@ -76,7 +79,9 @@ int pwm_config(struct pwm_device *pwm, i
+ 		writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
+ 		writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
+ 
+-		cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN;
++		cr = MX3_PWMCR_PRESCALER(prescale) |
++			MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
++			MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
+ 
+ 		if (cpu_is_mx25())
+ 			cr |= MX3_PWMCR_CLKSRC_IPG;
diff --git a/queue-2.6.32/scsi-mpt2sas-_scsih_smart_predicted_fault-uses-gfp_kernel-in-interrupt-context.patch b/queue-2.6.32/scsi-mpt2sas-_scsih_smart_predicted_fault-uses-gfp_kernel-in-interrupt-context.patch
new file mode 100644
index 0000000..269d035
--- /dev/null
+++ b/queue-2.6.32/scsi-mpt2sas-_scsih_smart_predicted_fault-uses-gfp_kernel-in-interrupt-context.patch
@@ -0,0 +1,31 @@
+From f6a290b419a2675c4b77a6b0731cd2a64332365e Mon Sep 17 00:00:00 2001
+From: Anton Blanchard <anton@samba.org>
+Date: Mon, 7 Nov 2011 22:05:21 +1100
+Subject: SCSI: mpt2sas: _scsih_smart_predicted_fault uses GFP_KERNEL in interrupt context
+
+From: Anton Blanchard <anton@samba.org>
+
+commit f6a290b419a2675c4b77a6b0731cd2a64332365e upstream.
+
+_scsih_smart_predicted_fault is called in an interrupt and therefore
+must allocate memory using GFP_ATOMIC.
+
+Signed-off-by: Anton Blanchard <anton@samba.org>
+Signed-off-by: James Bottomley <JBottomley@Parallels.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/scsi/mpt2sas/mpt2sas_scsih.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c
++++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
+@@ -3145,7 +3145,7 @@ _scsih_smart_predicted_fault(struct MPT2
+ 	/* insert into event log */
+ 	sz = offsetof(Mpi2EventNotificationReply_t, EventData) +
+ 	     sizeof(Mpi2EventDataSasDeviceStatusChange_t);
+-	event_reply = kzalloc(sz, GFP_KERNEL);
++	event_reply = kzalloc(sz, GFP_ATOMIC);
+ 	if (!event_reply) {
+ 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
+ 		    ioc->name, __FILE__, __LINE__, __func__);
diff --git a/queue-2.6.32/series b/queue-2.6.32/series
index 80c4449..5c570e2 100644
--- a/queue-2.6.32/series
+++ b/queue-2.6.32/series
@@ -1 +1,3 @@
 cfq-iosched-fix-cfq_cic_link-race-confition.patch
+scsi-mpt2sas-_scsih_smart_predicted_fault-uses-gfp_kernel-in-interrupt-context.patch
+mxc-pwm-should-active-during-doze-wait-dbg-mode.patch