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authorChee Hong Ang <chee.hong.ang@intel.com>2020-08-14 11:07:23 +0800
committerLey Foon Tan <ley.foon.tan@intel.com>2020-10-09 17:53:14 +0800
commit5bbeaaefec67bd794ea8652a9cada9e5380b6805 (patch)
treebcb7144dce8fa714ae5104e141656f4b1764968f /configs
parentde84e2d8c9e60452a2a1a6f99474d54a9919c024 (diff)
downloadu-boot-5bbeaaefec67bd794ea8652a9cada9e5380b6805.tar.gz
arm: socfpga: soc64: Disable CONFIG_PSCI_RESET
Don't invoke 'SYSTEM_RESET' PSCI function because PSCI function calls are not supported by u-boot running in EL3. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'configs')
-rw-r--r--configs/socfpga_agilex_defconfig1
-rw-r--r--configs/socfpga_stratix10_defconfig1
2 files changed, 2 insertions, 0 deletions
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index c4db1d0835..03ed1f5619 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -12,6 +12,7 @@ CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
+# CONFIG_PSCI_RESET is not set
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index 2b300e0605..e293b19e88 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_FS_FAT=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
CONFIG_OPTIMIZE_INLINING=y
CONFIG_SPL_OPTIMIZE_INLINING=y
+# CONFIG_PSCI_RESET is not set
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"