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| author | Hellosun Wu <wujiheng.tw@gmail.com> | 2019-10-29 13:36:31 +0800 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-08-16 11:48:53 +0100 |
| commit | 105f8386ad92d27f0171d748f9b2a804a5317fd9 (patch) | |
| tree | 69b7dc9f1ff551d607de8b115ca0ffbea43d353c | |
| parent | 6ec2ec4d32e554a97c057e3f2f0839679f7e6291 (diff) | |
| download | openocd-jz4730-105f8386ad92d27f0171d748f9b2a804a5317fd9.tar.gz | |
tcl: Add support for NDS V5 target and xc7/Corvette-F1
The "Corvette-F1" is an Arduino-compatible evaluation platform,
which fully supports AndesCore. The board has FTDI FT2232 to
connected to FPGA's JTAG interface.
The "ADP-XC7KFF676" is a development and prototyping board that
provides capacity for evaluation of AndesCore processors.
It works with AICE in-circuit debugging tools.
This patch also include target/nds32v5.cfg to support AndesCore
N22/N25F and AndeShape Platform AE250.
Change-Id: I144d5063d5086d00ec44634a5028b5ea5d2eba33
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/5338
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
| -rw-r--r-- | tcl/board/nds32_corvettef1.cfg | 18 | ||||
| -rw-r--r-- | tcl/board/nds32_xc7.cfg | 5 | ||||
| -rw-r--r-- | tcl/target/nds32v5.cfg | 12 |
3 files changed, 35 insertions, 0 deletions
diff --git a/tcl/board/nds32_corvettef1.cfg b/tcl/board/nds32_corvettef1.cfg new file mode 100644 index 000000000..1a3782c68 --- /dev/null +++ b/tcl/board/nds32_corvettef1.cfg @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# ADP-Corvette-F1 R1.0 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-r1/ +# ADP-Corvette-F1 R2.0 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-r2/ + +adapter_khz 10000 + +adapter driver ftdi +ftdi_device_desc "Dual RS232-HS" +ftdi_vid_pid 0x0403 0x6010 + +ftdi_layout_init 0x0c08 0x0f1b +ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +reset_config srst_only + +source [find target/nds32v5.cfg] diff --git a/tcl/board/nds32_xc7.cfg b/tcl/board/nds32_xc7.cfg new file mode 100644 index 000000000..82c00acd7 --- /dev/null +++ b/tcl/board/nds32_xc7.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# ADP-XC7K160/410 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/adp-xc7k160-410/ + +source [find target/nds32v5.cfg] diff --git a/tcl/target/nds32v5.cfg b/tcl/target/nds32v5.cfg new file mode 100644 index 000000000..56b5fedfe --- /dev/null +++ b/tcl/target/nds32v5.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Andes Core +# +# http://www.andestech.com +# + +set _CHIPNAME nds +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563D + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME riscv -chain-position $_TARGETNAME |