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authorKieran Bingham <kieran.bingham@ideasonboard.com>2021-09-22 15:10:13 +0100
committerKieran Bingham <kieran.bingham@ideasonboard.com>2021-09-22 15:10:13 +0100
commit61b5560118d70887c4acc6687912e78eb279bfde (patch)
treeda9806a235d6806c34f925131354e2dab9744469
parenta9d6287bf4fbc6eff6f93606086c74a35d8ce5f0 (diff)
downloadrcar-kbingham/vsp/v3u-rd-5.15.tar.gz
-rw-r--r--arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts29
-rw-r--r--drivers/pinctrl/renesas/core.c2
2 files changed, 30 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index dc671ff57ec767..1286b553e37047 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -10,6 +10,10 @@
#include "r8a779a0-falcon-csi-dsi.dtsi"
#include "r8a779a0-falcon-ethernet.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/gpio-keys.h>
+#include <dt-bindings/input/input.h>
+
/ {
model = "Renesas Falcon CPU and Breakout boards based on r8a779a0";
compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
@@ -17,6 +21,23 @@
aliases {
ethernet0 = &avb0;
};
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ btn1 {
+ pinctrl-0 = <&irq2_pins>;
+ pinctrl-names = "default";
+
+ debounce-interval = <50>;
+ label = "button1";
+ linux,code = <KEY_1>;
+ interrupt-parent = <&intc_ex>;
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+
+ //gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&avb0 {
@@ -45,6 +66,14 @@
};
&pfc {
+ // Intc_ex testing
+ irq2_pins: irq2 {
+ groups = "intc_ex_irq2";
+ function = "intc_ex";
+
+ bias-pull-up;
+ };
+
avb0_pins: avb0 {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
index ef8ef05ba93030..966883c6c64cd9 100644
--- a/drivers/pinctrl/renesas/core.c
+++ b/drivers/pinctrl/renesas/core.c
@@ -228,7 +228,7 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
- dev_dbg(pfc->dev, "write_reg addr = %x, value = 0x%x, field = %u, "
+ dev_err(pfc->dev, "KB: write_reg addr = %x, value = 0x%x, field = %u, "
"r_width = %u, f_width = %u\n",
crp->reg, value, field, crp->reg_width, hweight32(mask));