diff options
Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-sdx65.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 48 |
1 files changed, 25 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi index 40591a4da6a42f..a949454212e942 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi @@ -492,23 +492,25 @@ clocks = <&gcc GCC_USB30_SLV_AHB_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_USB30_MSTR_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", "core", "iface", "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 76 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 19 IRQ_TYPE_EDGE_BOTH>, <&pdc 18 IRQ_TYPE_EDGE_BOTH>, - <&pdc 19 IRQ_TYPE_EDGE_BOTH>; - interrupt-names = "hs_phy_irq", - "ss_phy_irq", + <&pdc 76 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", "dm_hs_phy_irq", - "dp_hs_phy_irq"; + "ss_phy_irq"; power-domains = <&gcc USB30_GDSC>; @@ -667,57 +669,57 @@ frame@17821000 { frame-number = <0>; - interrupts = <GIC_SPI 7 0x4>, - <GIC_SPI 6 0x4>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17821000 0x1000>, <0x17822000 0x1000>; }; frame@17823000 { frame-number = <1>; - interrupts = <GIC_SPI 8 0x4>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17823000 0x1000>; status = "disabled"; }; frame@17824000 { frame-number = <2>; - interrupts = <GIC_SPI 9 0x4>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17824000 0x1000>; status = "disabled"; }; frame@17825000 { frame-number = <3>; - interrupts = <GIC_SPI 10 0x4>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17825000 0x1000>; status = "disabled"; }; frame@17826000 { frame-number = <4>; - interrupts = <GIC_SPI 11 0x4>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17826000 0x1000>; status = "disabled"; }; frame@17827000 { frame-number = <5>; - interrupts = <GIC_SPI 12 0x4>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17827000 0x1000>; status = "disabled"; }; frame@17828000 { frame-number = <6>; - interrupts = <GIC_SPI 13 0x4>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17828000 0x1000>; status = "disabled"; }; frame@17829000 { frame-number = <7>; - interrupts = <GIC_SPI 14 0x4>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17829000 0x1000>; status = "disabled"; }; @@ -804,10 +806,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 12 0xf08>, - <1 10 0xf08>, - <1 11 0xf08>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <19200000>; }; }; |