diff options
| author | Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> | 2022-04-21 16:38:05 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> | 2022-05-10 11:18:55 +0900 |
| commit | 5d3b6ede2c6c80304944cdb5bc653957390afcf4 (patch) | |
| tree | 8b2339f497e7ca9fb1179749c894929dc762e168 | |
| parent | c8a93f913109e575f3b9ddc330f210aa3d3cf2e1 (diff) | |
| download | linux-visconti-dt.tar.gz | |
arm64: dts: visconti: Update the clock providers for PCIe host controllervisconti-arm-dt-for-v5.19dt-for-v5.19dt
Remove fixed clock and source common clock for PCIe host controller.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-7-nobuhiro1.iwamatsu@toshiba.co.jp/
| -rw-r--r-- | arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 16 |
2 files changed, 2 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index 527bb437dd9029..d209fdc985979b 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -72,6 +72,4 @@ &pcie { status = "okay"; - clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>; - clock-names = "ref", "core", "aux"; }; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 7c80a9434e10e4..0fc32c036f3073 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -129,20 +129,6 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; - clk25mhz: clk25mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - clock-output-names = "clk25mhz"; - }; - - clk600mhz: clk600mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <600000000>; - clock-output-names = "clk600mhz"; - }; - extclk100mhz: extclk100mhz { compatible = "fixed-clock"; #clock-cells = <0>; @@ -520,6 +506,8 @@ 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; max-link-speed = <2>; + clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>; + clock-names = "ref", "core", "aux"; status = "disabled"; }; }; |