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| author | Hai Nguyen Pham <hai.pham.ud@renesas.com> | 2017-11-24 13:10:01 +0700 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2018-12-07 19:57:07 +0900 |
| commit | ea31b54f9cc1df19b0cd7298a72d0fa40838750f (patch) | |
| tree | 0a0a0b8eb163f63d627af7a41ef860344fe03d5c | |
| parent | 4a24f369145d4919b81941c86dd1f37c90ad6976 (diff) | |
| download | renesas-bsp-ea31b54f9cc1df19b0cd7298a72d0fa40838750f.tar.gz | |
arm64: dts: r8a7795: Support IPMMU(MMU mode) for IPMMU-VP0/1 and IPMMU VC0/1
This patch enables MMNGR support for IPMMU(MMU mode) in IPMMU-VP0/1 and
IPMMU VC0/1.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 80ef8f80be65b..1896e5250dffc 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -1562,7 +1562,7 @@ }; ipmmu_vc0: mmu@fe6b0000 { - compatible = "renesas,ipmmu-r8a7795"; + compatible = "renesas,ipmmu-mmu-r8a7795"; reg = <0 0xfe6b0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 12>; power-domains = <&sysc R8A7795_PD_A3VC>; @@ -1571,7 +1571,7 @@ }; ipmmu_vc1: mmu@fe6f0000 { - compatible = "renesas,ipmmu-r8a7795"; + compatible = "renesas,ipmmu-mmu-r8a7795"; reg = <0 0xfe6f0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 13>; power-domains = <&sysc R8A7795_PD_A3VC>; @@ -1598,7 +1598,7 @@ }; ipmmu_vp0: mmu@fe990000 { - compatible = "renesas,ipmmu-r8a7795"; + compatible = "renesas,ipmmu-mmu-r8a7795"; reg = <0 0xfe990000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 16>; power-domains = <&sysc R8A7795_PD_A3VP>; @@ -1607,7 +1607,7 @@ }; ipmmu_vp1: mmu@fe980000 { - compatible = "renesas,ipmmu-r8a7795"; + compatible = "renesas,ipmmu-mmu-r8a7795"; reg = <0 0xfe980000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 17>; power-domains = <&sysc R8A7795_PD_A3VP>; |