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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2019-04-01 19:45:21 +0900 |
|---|---|---|
| committer | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2019-04-01 20:34:40 +0900 |
| commit | 7d702c9baadf7c9578dab25ee5513f96fe7a6f5a (patch) | |
| tree | 731c8bedddb9120d569ec10213321d5316754176 | |
| parent | 915233498bcfac9369169af32d4b49625d61db35 (diff) | |
| download | renesas-bsp-7d702c9baadf7c9578dab25ee5513f96fe7a6f5a.tar.gz | |
Revert "arm64: dts: r8a77965: Connect SDHI to IPMMU-DS1"
This reverts commit 21258b113ddea10592c3c90979f269bd31bd0622.
Multiple IPMMUs can not be operated simultaneously due to H3 Ver.1.x,
H3 Ver.2.0, M3 Ver.1.x hardware restriction.
M3-N has no similar hardware restriction, but disables IPMMU for SoCs
that have hardware restriction.
As a result, This reverts commit 21258b113dde ("arm64: dts: r8a77965:
Connect SDHI to IPMMU-DS1") to keep IPMMU for SDHI{0..3} is disabled by
default.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77965.dtsi | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index c528a56605ba1..74f3369a557c4 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1932,7 +1932,6 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 314>; - iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -1945,7 +1944,6 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 313>; - iommus = <&ipmmu_ds1 33>; status = "disabled"; }; @@ -1958,7 +1956,6 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 312>; - iommus = <&ipmmu_ds1 34>; status = "disabled"; }; @@ -1971,7 +1968,6 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 311>; - iommus = <&ipmmu_ds1 35>; status = "disabled"; }; |