diff options
| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2019-03-11 07:44:11 +0900 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2019-03-22 20:50:09 +0900 |
| commit | 405585bfc85d402bfb377ea3d347ff0457d27b61 (patch) | |
| tree | 0a5bd3c6a32cd4702e2695648409c7d56daea587 | |
| parent | a8795e6614fba81131423e000f8048ddff7f8b0f (diff) | |
| download | renesas-bsp-405585bfc85d402bfb377ea3d347ff0457d27b61.tar.gz | |
Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D"
This reverts commit 1f7ab968019378a4ebbd65dd127c9c114252f088.
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
Aug 24, 2018, the SEL_SIMCARD_{0,1} definition was to be deleted.
However, this fixes the double definition in R-Car Gen3 Hardware User's
Manual Rev.1.00. The definition is not deleted in R-Car Gen3 Hardware
User's Manual Rev.1.50.
So revert the commit and recover the definition.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c index 4c78e038cad35..c9583b83858bb 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c @@ -1167,7 +1167,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MSEL(IP13_19_16, RIF0_D1_A, SEL_DRIF0_0), PINMUX_IPSR_MSEL(IP13_19_16, SDA1_B, SEL_I2C1_1), PINMUX_IPSR_MSEL(IP13_19_16, TCLK2_B, SEL_TIMER_TMU_1), - PINMUX_IPSR_GPSR(IP13_19_16, SIM0_D_A), + PINMUX_IPSR_MSEL(IP13_19_16, SIM0_D_A, SEL_SIMCARD_0), PINMUX_IPSR_GPSR(IP13_23_20, MLB_DAT), PINMUX_IPSR_MSEL(IP13_23_20, TX0_B, SEL_SCIF0_1), @@ -1235,7 +1235,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_GPSR(IP15_15_12, TPU0TO2), PINMUX_IPSR_MSEL(IP15_15_12, SDA1_D, SEL_I2C1_3), PINMUX_IPSR_MSEL(IP15_15_12, FSO_CFE_1_N_B, SEL_FSO_1), - PINMUX_IPSR_GPSR(IP15_15_12, SIM0_D_B), + PINMUX_IPSR_MSEL(IP15_15_12, SIM0_D_B, SEL_SIMCARD_1), PINMUX_IPSR_GPSR(IP15_19_16, SSI_SDATA6), PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), |