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| author | Hai Nguyen Pham <hai.pham.ud@renesas.com> | 2017-11-24 10:55:21 +0700 |
|---|---|---|
| committer | Ryo Kataoka <ryo.kataoka.wt@renesas.com> | 2018-12-07 19:57:07 +0900 |
| commit | 2dedb8b5adfbda1192ea6c99d9e9fd7d245f627b (patch) | |
| tree | fc86f0d1125ca335ce3e9ef56c8c202c176c80dc | |
| parent | 13c165abca989d0194196116144ae8fa129f3454 (diff) | |
| download | renesas-bsp-2dedb8b5adfbda1192ea6c99d9e9fd7d245f627b.tar.gz | |
arm64: dts: r8a77965: Support IPMMU(MMU mode) for IPMMU-VP0 and IPMMU-VC0
This patch enables MMNGR support for IPMMU(MMU mode) in IPMMU-VP0 and
IPMMU-VC0.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77965.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index c31946d7fc286f..454a67b132f478 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -909,7 +909,7 @@ }; ipmmu_vc0: mmu@fe6b0000 { - compatible = "renesas,ipmmu-r8a77965"; + compatible = "renesas,ipmmu-mmu-r8a77965"; reg = <0 0xfe6b0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 12>; power-domains = <&sysc R8A77965_PD_A3VC>; @@ -927,7 +927,7 @@ }; ipmmu_vp0: mmu@fe990000 { - compatible = "renesas,ipmmu-r8a77965"; + compatible = "renesas,ipmmu-mmu-r8a77965"; reg = <0 0xfe990000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 16>; power-domains = <&sysc R8A77965_PD_A3VP>; |