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authorHai Nguyen Pham <hai.pham.ud@renesas.com>2019-03-08 15:20:03 +0700
committerRyo Kataoka <ryo.kataoka.wt@renesas.com>2019-03-22 20:50:41 +0900
commit0e9229ea60ac32cbed06910e8677b66c0e6553a3 (patch)
treeee9d511f06144abc0d1eaaae2ee94d4915773ed8
parentc3eef50d22ba7f608eac1cee39357c58ce258c46 (diff)
downloadrenesas-bsp-0e9229ea60ac32cbed06910e8677b66c0e6553a3.tar.gz
Revert "arm64: dts: renesas: r8a77990: Attach the SYS-DMAC to the IPMMU"
This reverts commit b7b0f8ae1531ee00528797bb728a6ef93db2ceb3 to keep IPMMU address translation for SYS-DMAC0, SYS-DMAC1 and SYS-DMAC2 is disabled by default. Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77990.dtsi24
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 295f6a1fa8c0d..3e3aa44a293af 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -688,14 +688,6 @@
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
- <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
- <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
- <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
- <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
- <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
- <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
- <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
};
dmac1: dma-controller@e7300000 {
@@ -730,14 +722,6 @@
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
- <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
- <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
- <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
- <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
- <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
- <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
- <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
};
dmac2: dma-controller@e7310000 {
@@ -772,14 +756,6 @@
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
- iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
- <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
- <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
- <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
- <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
- <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
- <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
- <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_mm: mmu@e67b0000 {