usb and pci patches added

3 files changed, 203 insertions, 0 deletions

diff --git a/pci/pci-i386-x86_84-disable-pci-resource-decode-on-device-disable.patch b/pci/pci-i386-x86_84-disable-pci-resource-decode-on-device-disable.patch
new file mode 100644
index 0000000000000..74fbfdc98af89
--- /dev/null
+++ b/pci/pci-i386-x86_84-disable-pci-resource-decode-on-device-disable.patch
@@ -0,0 +1,68 @@
+From owner-linux-pci@atrey.karlin.mff.cuni.cz Wed May  3 15:32:07 2006
+Date: Wed, 3 May 2006 15:27:47 -0700
+From: Rajesh Shah <rajesh.shah@intel.com>
+To: gregkh@suse.de, <ak@suse.de>
+Cc: <akpm@osdl.org>
+Subject: PCI: i386/x86_84: disable PCI resource decode on device disable
+Message-ID: <20060503152747.A29327@unix-os.sc.intel.com>
+Content-Disposition: inline
+
+
+When a PCI device is disabled via pci_disable_device(), it's still
+left decoding its BAR resource ranges even though its driver
+will have likely released those regions (and may even have
+unloaded). pci_enable_device() already explicitly enables 
+BAR resource decode for the device being enabled. This patch
+disables resource decode for the PCI device being disabled,
+making it symmetric with the enable call.
+
+I saw this while doing something else, not because of a
+problem report. Still, seems to be the correct thing to do.
+
+Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/i386/pci/common.c |    1 +
+ arch/i386/pci/i386.c   |    9 +++++++++
+ arch/i386/pci/pci.h    |    1 +
+ 3 files changed, 11 insertions(+)
+
+--- gregkh-2.6.orig/arch/i386/pci/common.c
++++ gregkh-2.6/arch/i386/pci/common.c
+@@ -288,6 +288,7 @@ int pcibios_enable_device(struct pci_dev
+ 
+ void pcibios_disable_device (struct pci_dev *dev)
+ {
++	pcibios_disable_resources(dev);
+ 	if (pcibios_disable_irq)
+ 		pcibios_disable_irq(dev);
+ }
+--- gregkh-2.6.orig/arch/i386/pci/i386.c
++++ gregkh-2.6/arch/i386/pci/i386.c
+@@ -242,6 +242,15 @@ int pcibios_enable_resources(struct pci_
+ 	return 0;
+ }
+ 
++void pcibios_disable_resources(struct pci_dev *dev)
++{
++	u16 cmd;
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++}
++
+ /*
+  *  If we set up a device for bus mastering, we need to check the latency
+  *  timer as certain crappy BIOSes forget to set it properly.
+--- gregkh-2.6.orig/arch/i386/pci/pci.h
++++ gregkh-2.6/arch/i386/pci/pci.h
+@@ -35,6 +35,7 @@ extern unsigned int pcibios_max_latency;
+ 
+ void pcibios_resource_survey(void);
+ int pcibios_enable_resources(struct pci_dev *, int);
++void pcibios_disable_resources(struct pci_dev *);
+ 
+ /* pci-pc.c */
+ 
diff --git a/pci/shpchp-create-shpchpd-at-controller-probe-time.patch b/pci/shpchp-create-shpchpd-at-controller-probe-time.patch
new file mode 100644
index 0000000000000..f6274f97073e2
--- /dev/null
+++ b/pci/shpchp-create-shpchpd-at-controller-probe-time.patch
@@ -0,0 +1,90 @@
+From kaneshige.kenji@jp.fujitsu.com Wed May  3 07:45:10 2006
+Message-ID: <4458C13C.9030306@jp.fujitsu.com>
+Date: Wed, 03 May 2006 23:42:04 +0900
+From: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
+To: Greg KH <greg@kroah.com>, Greg KH <gregkh@suse.de>,
+	Kristen Accardi <kristen.c.accardi@intel.com>
+Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
+Subject: shpchp: Create shpchpd at controller probe time
+
+The workqueue thread of shpchp driver should be created only when SHPC
+based hotplug slots are detected on the system.
+
+Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
+Cc: Kristen Accardi <kristen.c.accardi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/pci/hotplug/shpchp_core.c |    8 --------
+ drivers/pci/hotplug/shpchp_hpc.c  |   19 +++++++++++++++++++
+ 2 files changed, 19 insertions(+), 8 deletions(-)
+
+--- gregkh-2.6.orig/drivers/pci/hotplug/shpchp_core.c
++++ gregkh-2.6/drivers/pci/hotplug/shpchp_core.c
+@@ -491,16 +491,9 @@ static int __init shpcd_init(void)
+ 	shpchp_poll_mode = 1;
+ #endif
+ 
+-	shpchp_wq = create_singlethread_workqueue("shpchpd");
+-	if (!shpchp_wq)
+-		return -ENOMEM;
+-
+ 	retval = pci_register_driver(&shpc_driver);
+ 	dbg("%s: pci_register_driver = %d\n", __FUNCTION__, retval);
+ 	info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
+-	if (retval) {
+-		destroy_workqueue(shpchp_wq);
+-	}
+ 	return retval;
+ }
+ 
+@@ -508,7 +501,6 @@ static void __exit shpcd_cleanup(void)
+ {
+ 	dbg("unload_shpchpd()\n");
+ 	pci_unregister_driver(&shpc_driver);
+-	destroy_workqueue(shpchp_wq);
+ 	info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
+ }
+ 
+--- gregkh-2.6.orig/drivers/pci/hotplug/shpchp_hpc.c
++++ gregkh-2.6/drivers/pci/hotplug/shpchp_hpc.c
+@@ -216,6 +216,8 @@ static struct php_ctlr_state_s *php_ctlr
+ static int ctlr_seq_num = 0;	/* Controller sequenc # */
+ static spinlock_t list_lock;
+ 
++static atomic_t shpchp_num_controllers = ATOMIC_INIT(0);
++
+ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs);
+ 
+ static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds);
+@@ -866,6 +868,13 @@ static void hpc_release_ctlr(struct cont
+ 
+ 	kfree(php_ctlr);
+ 
++	/*
++	 * If this is the last controller to be released, destroy the
++	 * shpchpd work queue
++	 */
++	if (atomic_dec_and_test(&shpchp_num_controllers))
++		destroy_workqueue(shpchp_wq);
++
+ DBG_LEAVE_ROUTINE
+ 			  
+ }
+@@ -1461,6 +1470,16 @@ int shpc_init(struct controller * ctrl, 
+ 	ctlr_seq_num++;
+ 
+ 	/*
++	 * If this is the first controller to be initialized,
++	 * initialize the shpchpd work queue
++	 */
++	if (atomic_add_return(1, &shpchp_num_controllers) == 1) {
++		shpchp_wq = create_singlethread_workqueue("shpchpd");
++		if (!shpchp_wq)
++			return -ENOMEM;
++	}
++
++	/*
+ 	 * Unmask all event interrupts of all slots
+ 	 */
+ 	for (hp_slot = 0; hp_slot < php_ctlr->num_slots; hp_slot++) {
diff --git a/pci/shpchp-mask-global-serr-and-intr-at-controller-release-time.patch b/pci/shpchp-mask-global-serr-and-intr-at-controller-release-time.patch
new file mode 100644
index 0000000000000..9da22b3746527
--- /dev/null
+++ b/pci/shpchp-mask-global-serr-and-intr-at-controller-release-time.patch
@@ -0,0 +1,45 @@
+From kaneshige.kenji@jp.fujitsu.com Wed May  3 07:37:00 2006
+Message-ID: <4458BF69.5000408@jp.fujitsu.com>
+Date: Wed, 03 May 2006 23:34:17 +0900
+From: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
+To: Greg KH <greg@kroah.com>, Greg KH <gregkh@suse.de>, Kristen Accardi <kristen.c.accardi@intel.com>
+Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
+Subject: shpchp: Mask Global SERR and Intr at controller release time
+
+Global SERR and Interrupt should be masked at shpchp driver unload time.
+
+Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
+Cc: Kristen Accardi <kristen.c.accardi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/pci/hotplug/shpchp_hpc.c |   11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+--- gregkh-2.6.orig/drivers/pci/hotplug/shpchp_hpc.c
++++ gregkh-2.6/drivers/pci/hotplug/shpchp_hpc.c
+@@ -798,7 +798,7 @@ static void hpc_release_ctlr(struct cont
+ 	struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
+ 	struct php_ctlr_state_s *p, *p_prev;
+ 	int i;
+-	u32 slot_reg;
++	u32 slot_reg, serr_int;
+ 
+ 	DBG_ENTER_ROUTINE 
+ 
+@@ -822,6 +822,15 @@ static void hpc_release_ctlr(struct cont
+ 
+ 	cleanup_slots(ctrl);
+ 
++	/*
++	 * Mask SERR and System Interrut generation
++	 */
++	serr_int = shpc_readl(ctrl, SERR_INTR_ENABLE);
++	serr_int |= (GLOBAL_INTR_MASK  | GLOBAL_SERR_MASK |
++		     COMMAND_INTR_MASK | ARBITER_SERR_MASK);
++	serr_int &= ~SERR_INTR_RSVDZ_MASK;
++	shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
++
+ 	if (shpchp_poll_mode) {
+ 	    del_timer(&php_ctlr->int_poll_timer);
+ 	} else {