2.6.14-git11 update

1 files changed, 20 insertions, 21 deletions

diff --git a/pci/pci-changing-msi-to-use-physical-delivery-mode-always.patch b/pci/pci-changing-msi-to-use-physical-delivery-mode-always.patch
index eca41af3c035c..4a88d595954f8 100644
--- a/pci/pci-changing-msi-to-use-physical-delivery-mode-always.patch
+++ b/pci/pci-changing-msi-to-use-physical-delivery-mode-always.patch
@@ -1,44 +1,42 @@
-From araj@unix-os.sc.intel.com Tue Nov  8 08:09:05 2005
-Date: Tue, 8 Nov 2005 07:00:38 -0800
+From araj@unix-os.sc.intel.com Tue Nov  8 23:28:27 2005
+Date: Tue, 8 Nov 2005 21:42:33 -0800
 From: Ashok Raj <ashok.raj@intel.com>
-Cc: akpm@osdl.org, gregkh@suse.de, ak@muc.de
-Subject: PCI: Changing MSI to use physical delivery mode always.
-Message-ID: <20051108070038.A15318@unix-os.sc.intel.com>
+To: gregkh@suse.de
+Subject: PCI: Change MSI to use physical delivery mode always
+Message-ID: <20051108214232.A23614@unix-os.sc.intel.com>
 Content-Disposition: inline
 
-
 MSI hardcoded delivery mode to use logical delivery mode. Recently
 x86_64 moved to use physical mode addressing to support physflat mode.
 With this mode enabled noticed that my eth with MSI werent working.
 
-msi_address_init()  was hardcoded to use logical mode for i386 and
-x86_64.  So when we switch to use physical mode, things stopped working.
+msi_address_init()  was hardcoded to use logical mode for i386 and x86_64.
+So when we switch to use physical mode, things stopped working.
 
 Since anyway we dont use lowest priority delivery with MSI, its always
-directed to just a single CPU. Its safe  and simpler to use physical
-mode always, even when we use logical delivery mode for IPI's or other
-ioapic RTE's.
-
+directed to just a single CPU. Its safe  and simpler to use 
+physical mode always, even when we use logical delivery mode for IPI's 
+or other ioapic RTE's.
 
 Signed-off-by: Ashok Raj <ashok.raj@intel.com>
 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
----
- drivers/pci/msi.c        |   19 +++++++++++--------
+-----------------------------------------------------------
+ drivers/pci/msi.c        |   20 ++++++++++++--------
  include/asm-i386/msi.h   |    9 +--------
  include/asm-i386/smp.h   |    6 ++++++
  include/asm-ia64/msi.h   |    3 ---
  include/asm-x86_64/msi.h |    4 +---
  include/asm-x86_64/smp.h |    6 ++++++
- 6 files changed, 25 insertions(+), 22 deletions(-)
+ 6 files changed, 26 insertions(+), 22 deletions(-)
 
+---
 --- gregkh-2.6.orig/drivers/pci/msi.c
 +++ gregkh-2.6/drivers/pci/msi.c
 @@ -23,6 +23,8 @@
  #include "pci.h"
  #include "msi.h"
  
-+#define TARGET_CPU		first_cpu(cpu_online_map)
++#define MSI_TARGET_CPU		first_cpu(cpu_online_map)
 +
  static DEFINE_SPINLOCK(msi_lock);
  static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
@@ -64,23 +62,24 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
  		pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
  			address.lo_address.value);
  		set_native_irq_info(irq, cpu_mask);
-@@ -123,9 +126,8 @@ static void set_msi_affinity(unsigned in
+@@ -123,9 +126,9 @@ static void set_msi_affinity(unsigned in
  
  		address.lo_address.value = readl(entry->mask_base + offset);
  		address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
 -		address.lo_address.value |= (cpu_mask_to_apicid(cpu_mask) <<
 -			MSI_TARGET_CPU_SHIFT);
 -		entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask);
-+		address.lo_address.value |= (dest_cpu << MSI_TARGET_CPU_SHIFT);
++		address.lo_address.value |= (cpu_physical_id(dest_cpu) <<
++									MSI_TARGET_CPU_SHIFT);
 +		entry->msi_attrib.current_cpu = cpu_physical_id(dest_cpu);
  		writel(address.lo_address.value, entry->mask_base + offset);
  		set_native_irq_info(irq, cpu_mask);
  		break;
-@@ -259,14 +261,15 @@ static void msi_data_init(struct msg_dat
+@@ -259,14 +262,15 @@ static void msi_data_init(struct msg_dat
  static void msi_address_init(struct msg_address *msi_address)
  {
  	unsigned int	dest_id;
-+	unsigned long	dest_phys_id = cpu_physical_id(TARGET_CPU);
++	unsigned long	dest_phys_id = cpu_physical_id(MSI_TARGET_CPU);
  
  	memset(msi_address, 0, sizeof(struct msg_address));
  	msi_address->hi_address = (u32)0;