diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2006-01-27 10:21:23 -0800 |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-01-27 10:21:23 -0800 |
commit | afba9fdd0bc76de323628ad9a25b20310d05031c (patch) | |
tree | 8b961788bf41178f29ca8519839447cf2ef835d4 /pci | |
parent | 1bb63250ce140bce4ce684ec6b733e4af723d803 (diff) | |
download | patches-afba9fdd0bc76de323628ad9a25b20310d05031c.tar.gz |
more usb and pci patches
Diffstat (limited to 'pci')
-rw-r--r-- | pci/pci-fix-msi-build-breakage-in-x86_64.patch | 47 | ||||
-rw-r--r-- | pci/pci-handle-bogus-mcfg-entries.patch | 89 |
2 files changed, 136 insertions, 0 deletions
diff --git a/pci/pci-fix-msi-build-breakage-in-x86_64.patch b/pci/pci-fix-msi-build-breakage-in-x86_64.patch new file mode 100644 index 0000000000000..ea83ebec42c14 --- /dev/null +++ b/pci/pci-fix-msi-build-breakage-in-x86_64.patch @@ -0,0 +1,47 @@ +From akpm@osdl.org Sun Jan 22 23:29:50 2006 +Message-Id: <200601230729.k0N7TdKi012213@shell0.pdx.osdl.net> +From: Chuck Ebbert <76306.1226@compuserve.com> +Subject: PCI: fix MSI build breakage in x86_64 +To: 76306.1226@compuserve.com, gregkh@suse.de, maule@sgi.com +Date: Sun, 22 Jan 2006 23:29:23 -0800 + + +gregkh-pci-msi-vector-targeting-abstractions.patch breaks msi on x86_64: + +In file included from include/asm/msi.h:11, + from drivers/pci/msi.h:9, + from drivers/pci/msi-apic.c:15: +include/asm/smp.h:103: error: syntax error before ‘->’ token + +include/asm-x86_64/msi.h:#include <asm/mach_apic.h> + +include/asm-x86_64/mach_apic.h:#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) + +include/asm-x86_64/smp.h:103:static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) + +drivers/pci/msi.c does not have this problem because it includes <asm/smp.h> +_before_ "msi.h" so the #define overrides the inline function. + +Ugly patch to fix this follows... at least it compiles now... + +Fix msi on x86_64, broken due to include-ordering problems. + +Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> +Cc: Mark Maule <maule@sgi.com> +Signed-off-by: Andrew Morton <akpm@osdl.org> +Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +--- + drivers/pci/msi-apic.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- gregkh-2.6.orig/drivers/pci/msi-apic.c ++++ gregkh-2.6/drivers/pci/msi-apic.c +@@ -11,6 +11,8 @@ + #include <linux/pci.h> + #include <linux/irq.h> + ++#include <asm/smp.h> ++ + #include "pci.h" + #include "msi.h" + diff --git a/pci/pci-handle-bogus-mcfg-entries.patch b/pci/pci-handle-bogus-mcfg-entries.patch new file mode 100644 index 0000000000000..2dae04837f6ac --- /dev/null +++ b/pci/pci-handle-bogus-mcfg-entries.patch @@ -0,0 +1,89 @@ +From ak@suse.de Fri Jan 27 09:45:26 2006 +From: Andi Kleen <ak@suse.de> +To: Greg KH <greg@kroah.com> +Subject: PCI: handle bogus MCFG entries +Date: Fri, 27 Jan 2006 02:03:50 +0100 +Cc: Stephen Hemminger <shemminger@osdl.org>, Matthew Wilcox <matthew@wil.cx> +Message-Id: <200601270203.51244.ak@suse.de> + + +Handle more bogus MCFG entries + +Some Asus P4 boards seem to have broken MCFG tables with +only a single entry for busses 0-0. Special case these +and assume they mean all busses can be accessed. + +Signed-off-by: Andi Kleen <ak@suse.de> +Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +--- + arch/i386/pci/mmconfig.c | 15 +++++++++++++-- + arch/x86_64/pci/mmconfig.c | 19 ++++++++++++++----- + 2 files changed, 27 insertions(+), 7 deletions(-) + +--- gregkh-2.6.orig/arch/i386/pci/mmconfig.c ++++ gregkh-2.6/arch/i386/pci/mmconfig.c +@@ -36,8 +36,7 @@ static u32 get_base_addr(unsigned int se + while (1) { + ++cfg_num; + if (cfg_num >= pci_mmcfg_config_num) { +- /* Not found - fallback to type 1 */ +- return 0; ++ break; + } + cfg = &pci_mmcfg_config[cfg_num]; + if (cfg->pci_segment_group_number != seg) +@@ -46,6 +45,18 @@ static u32 get_base_addr(unsigned int se + (cfg->end_bus_number >= bus)) + return cfg->base_address; + } ++ ++ /* Handle more broken MCFG tables on Asus etc. ++ They only contain a single entry for bus 0-0. Assume ++ this applies to all busses. */ ++ cfg = &pci_mmcfg_config[0]; ++ if (pci_mmcfg_config_num == 1 && ++ cfg->pci_segment_group_number == 0 && ++ (cfg->start_bus_number | cfg->end_bus_number) == 0) ++ return cfg->base_address; ++ ++ /* Fall back to type 0 */ ++ return 0; + } + + static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) +--- gregkh-2.6.orig/arch/x86_64/pci/mmconfig.c ++++ gregkh-2.6/arch/x86_64/pci/mmconfig.c +@@ -29,11 +29,8 @@ static char __iomem *get_virt(unsigned i + + while (1) { + ++cfg_num; +- if (cfg_num >= pci_mmcfg_config_num) { +- /* Not found - fall back to type 1. This happens +- e.g. on the internal devices of a K8 northbridge. */ +- return NULL; +- } ++ if (cfg_num >= pci_mmcfg_config_num) ++ break; + cfg = pci_mmcfg_virt[cfg_num].cfg; + if (cfg->pci_segment_group_number != seg) + continue; +@@ -41,6 +38,18 @@ static char __iomem *get_virt(unsigned i + (cfg->end_bus_number >= bus)) + return pci_mmcfg_virt[cfg_num].virt; + } ++ ++ /* Handle more broken MCFG tables on Asus etc. ++ They only contain a single entry for bus 0-0. Assume ++ this applies to all busses. */ ++ cfg = &pci_mmcfg_config[0]; ++ if (pci_mmcfg_config_num == 1 && ++ cfg->pci_segment_group_number == 0 && ++ (cfg->start_bus_number | cfg->end_bus_number) == 0) ++ return cfg->base_address; ++ ++ /* Fall back to type 0 */ ++ return 0; + } + + static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) |