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authorGreg Kroah-Hartman <gregkh@suse.de>2005-12-08 17:29:33 -0800
committerGreg Kroah-Hartman <gregkh@suse.de>2005-12-08 17:29:33 -0800
commit968b59974e69c2e51804f27c43d625445dd48687 (patch)
tree7b73689f216d9f2a102bcbabcb7de6e9c4a18f31 /pci
parentb696389d003b5b2e21c004547c8ab4483635516d (diff)
downloadpatches-968b59974e69c2e51804f27c43d625445dd48687.tar.gz
more stuff
Diffstat (limited to 'pci')
-rw-r--r--pci/pci-use-bus-numbers-sparsely-if-necessary.patch88
-rw-r--r--pci/pciehp-allow-bridged-card-hotplug.patch102
-rw-r--r--pci/pciehp-handle-sticky-power-fault-status.patch64
3 files changed, 254 insertions, 0 deletions
diff --git a/pci/pci-use-bus-numbers-sparsely-if-necessary.patch b/pci/pci-use-bus-numbers-sparsely-if-necessary.patch
new file mode 100644
index 0000000000000..4f2701ccf6977
--- /dev/null
+++ b/pci/pci-use-bus-numbers-sparsely-if-necessary.patch
@@ -0,0 +1,88 @@
+From brodo@dominikbrodowski.de Thu Dec 8 08:03:36 2005
+Date: Thu, 8 Dec 2005 16:53:12 +0100
+From: Dominik Brodowski <linux@dominikbrodowski.net>
+To: greg@kroah.com
+Subject: PCI: use bus numbers sparsely, if necessary
+Message-ID: <20051208155312.GA3759@dominikbrodowski.de>
+Content-Disposition: inline
+
+Add a warning if a child bus may be inaccessible because the
+parent bridge has wrong secondary or subordinate bus numbers.
+Note that this may or may not happen on "transparent" bridges,
+as can be seen in bug #5557.
+
+Also, if we do not fix up the assignment of bus numbers, try to
+make use of the bus number space available.
+
+Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/pci/probe.c | 39 +++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 37 insertions(+), 2 deletions(-)
+
+--- gregkh-2.6.orig/drivers/pci/probe.c
++++ gregkh-2.6/drivers/pci/probe.c
+@@ -433,7 +433,7 @@ int __devinit pci_scan_bridge(struct pci
+ {
+ struct pci_bus *child;
+ int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
+- u32 buses, i;
++ u32 buses, i, j = 0;
+ u16 bctl;
+
+ pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
+@@ -543,10 +543,29 @@ int __devinit pci_scan_bridge(struct pci
+ * as cards with a PCI-to-PCI bridge can be
+ * inserted later.
+ */
+- for (i=0; i<CARDBUS_RESERVE_BUSNR; i++)
++ for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
++ struct pci_bus *parent = bus;
+ if (pci_find_bus(pci_domain_nr(bus),
+ max+i+1))
+ break;
++ while (parent->parent) {
++ if ((!pcibios_assign_all_busses()) &&
++ (parent->subordinate > max) &&
++ (parent->subordinate <= max+i)) {
++ j = 1;
++ }
++ parent = parent->parent;
++ }
++ if (j) {
++ /*
++ * Often, there are two cardbus bridges
++ * -- try to leave one valid bus number
++ * for each one.
++ */
++ i /= 2;
++ break;
++ }
++ }
+ max += i;
+ pci_fixup_parent_subordinate_busnr(child, max);
+ }
+@@ -561,6 +580,22 @@ int __devinit pci_scan_bridge(struct pci
+
+ sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
+
++ while (bus->parent) {
++ if ((child->subordinate > bus->subordinate) ||
++ (child->number > bus->subordinate) ||
++ (child->number < bus->number) ||
++ (child->subordinate < bus->number)) {
++ printk(KERN_WARNING "PCI: Bus #%02x (-#%02x) may be "
++ "hidden behind%s bridge #%02x (-#%02x)%s\n",
++ child->number, child->subordinate,
++ bus->self->transparent ? " transparent" : " ",
++ bus->number, bus->subordinate,
++ pcibios_assign_all_busses() ? " " :
++ " (try 'pci=assign-busses')");
++ }
++ bus = bus->parent;
++ }
++
+ return max;
+ }
+
diff --git a/pci/pciehp-allow-bridged-card-hotplug.patch b/pci/pciehp-allow-bridged-card-hotplug.patch
new file mode 100644
index 0000000000000..7b35a736128ab
--- /dev/null
+++ b/pci/pciehp-allow-bridged-card-hotplug.patch
@@ -0,0 +1,102 @@
+From rshah1@unix-os.sc.intel.com Thu Dec 8 13:52:41 2005
+Date: Thu, 8 Dec 2005 12:12:25 -0800
+From: Rajesh Shah <rajesh.shah@intel.com>
+To: gregkh@suse.de
+Cc: Martin.Franc@ca.kontron.com, kristen.c.accardi@intel.com
+Subject: pciehp: allow bridged card hotplug
+Message-ID: <20051208121224.B8190@unix-os.sc.intel.com>
+Content-Disposition: inline
+
+This patch fixes bugs in the pciehp driver that prevent hot-add
+of a card with PCI bridges on it.
+
+Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+
+---
+ drivers/pci/hotplug/pciehp_pci.c | 52 +++++++++++++++++++++------------------
+ 1 file changed, 28 insertions(+), 24 deletions(-)
+
+--- gregkh-2.6.orig/drivers/pci/hotplug/pciehp_pci.c
++++ gregkh-2.6/drivers/pci/hotplug/pciehp_pci.c
+@@ -34,6 +34,31 @@
+ #include "../pci.h"
+ #include "pciehp.h"
+
++static int pciehp_add_bridge(struct pci_dev *dev)
++{
++ struct pci_bus *parent = dev->bus;
++ int pass, busnr, start = parent->secondary;
++ int end = parent->subordinate;
++
++ for (busnr = start; busnr <= end; busnr++) {
++ if (!pci_find_bus(pci_domain_nr(parent), busnr))
++ break;
++ }
++ if (busnr-- > end) {
++ err("No bus number available for hot-added bridge %s\n",
++ pci_name(dev));
++ return -1;
++ }
++ for (pass = 0; pass < 2; pass++)
++ busnr = pci_scan_bridge(parent, dev, busnr, pass);
++ if (!dev->subordinate)
++ return -1;
++ pci_bus_size_bridges(dev->subordinate);
++ pci_bus_assign_resources(parent);
++ pci_enable_bridges(parent);
++ pci_bus_add_devices(parent);
++ return 0;
++}
+
+ int pciehp_configure_device(struct slot *p_slot)
+ {
+@@ -55,8 +80,8 @@ int pciehp_configure_device(struct slot
+ }
+
+ for (fn = 0; fn < 8; fn++) {
+- if (!(dev = pci_find_slot(p_slot->bus,
+- PCI_DEVFN(p_slot->device, fn))))
++ dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, fn));
++ if (!dev)
+ continue;
+ if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
+ err("Cannot hot-add display device %s\n",
+@@ -65,27 +90,7 @@ int pciehp_configure_device(struct slot
+ }
+ if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
+ (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
+- /* Find an unused bus number for the new bridge */
+- struct pci_bus *child;
+- unsigned char busnr, start = parent->secondary;
+- unsigned char end = parent->subordinate;
+- for (busnr = start; busnr <= end; busnr++) {
+- if (!pci_find_bus(pci_domain_nr(parent),
+- busnr))
+- break;
+- }
+- if (busnr >= end) {
+- err("No free bus for hot-added bridge\n");
+- continue;
+- }
+- child = pci_add_new_bus(parent, dev, busnr);
+- if (!child) {
+- err("Cannot add new bus for %s\n",
+- pci_name(dev));
+- continue;
+- }
+- child->subordinate = pci_do_scan_bus(child);
+- pci_bus_size_bridges(child);
++ pciehp_add_bridge(dev);
+ }
+ /* TBD: program firmware provided _HPP values */
+ /* program_fw_provided_values(dev); */
+@@ -93,7 +98,6 @@ int pciehp_configure_device(struct slot
+
+ pci_bus_assign_resources(parent);
+ pci_bus_add_devices(parent);
+- pci_enable_bridges(parent);
+ return 0;
+ }
+
diff --git a/pci/pciehp-handle-sticky-power-fault-status.patch b/pci/pciehp-handle-sticky-power-fault-status.patch
new file mode 100644
index 0000000000000..a3b46c9b50b26
--- /dev/null
+++ b/pci/pciehp-handle-sticky-power-fault-status.patch
@@ -0,0 +1,64 @@
+From rshah1@unix-os.sc.intel.com Thu Dec 8 13:52:40 2005
+Date: Thu, 8 Dec 2005 11:55:57 -0800
+From: Rajesh Shah <rajesh.shah@intel.com>
+To: gregkh@suse.de
+Cc: thomas.schaefer@kontron.com, kristen.c.accardi@intel.com, pcihpd-discuss@lists.sourceforge.net
+Subject: pciehp: handle sticky power-fault status
+Message-ID: <20051208115557.A6139@unix-os.sc.intel.com>
+Content-Disposition: inline
+
+From: Thomas Schaefer <thomas.schaefer@kontron.com>
+
+This patch disables power fault, MRL sensor and presence detection
+interrupts when a PCIe slot is powered-off and enables those
+interrupts when it is powered-on again. This is necessary to prevent
+the associated events from causing an endless cycle of interrupts
+due to the power-fault bit, which stays set till power is restored
+to the slot.
+
+Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
+Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+
+---
+ drivers/pci/hotplug/pciehp_hpc.c | 19 +++++++++++++++++--
+ 1 file changed, 17 insertions(+), 2 deletions(-)
+
+--- gregkh-2.6.orig/drivers/pci/hotplug/pciehp_hpc.c
++++ gregkh-2.6/drivers/pci/hotplug/pciehp_hpc.c
+@@ -784,8 +784,13 @@ static int hpc_power_on_slot(struct slot
+
+ slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON;
+
++ /* Enable detection that we turned off at slot power-off time */
+ if (!pciehp_poll_mode)
+- slot_cmd = slot_cmd | HP_INTR_ENABLE;
++ slot_cmd = slot_cmd |
++ PWR_FAULT_DETECT_ENABLE |
++ MRL_DETECT_ENABLE |
++ PRSN_DETECT_ENABLE |
++ HP_INTR_ENABLE;
+
+ retval = pcie_write_cmd(slot, slot_cmd);
+
+@@ -830,8 +835,18 @@ static int hpc_power_off_slot(struct slo
+
+ slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF;
+
++ /*
++ * If we get MRL or presence detect interrupts now, the isr
++ * will notice the sticky power-fault bit too and issue power
++ * indicator change commands. This will lead to an endless loop
++ * of command completions, since the power-fault bit remains on
++ * till the slot is powered on again.
++ */
+ if (!pciehp_poll_mode)
+- slot_cmd = slot_cmd | HP_INTR_ENABLE;
++ slot_cmd = (slot_cmd &
++ ~PWR_FAULT_DETECT_ENABLE &
++ ~MRL_DETECT_ENABLE &
++ ~PRSN_DETECT_ENABLE) | HP_INTR_ENABLE;
+
+ retval = pcie_write_cmd(slot, slot_cmd);
+