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authorGreg Kroah-Hartman <gregkh@suse.de>2006-06-16 15:31:08 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-16 15:31:08 -0700
commit5b88ea4d35a4788dcfbc3047149276898e194a4b (patch)
tree3873bcbf682aeb9ef089f69f4c88d8d2d5bc0073 /pci
parent3ab23ec21bc7eb5f1cc934b7c8ab126d01dd3f51 (diff)
downloadpatches-5b88ea4d35a4788dcfbc3047149276898e194a4b.tar.gz
lots of new patches
Diffstat (limited to 'pci')
-rw-r--r--pci/pci-bus-parity-status-sysfs-interface.patch65
-rw-r--r--pci/pci-fix-memory-leak-in-mmconfig-error-path.patch32
-rw-r--r--pci/pci-fix-to-pci-ignore-pre-set-64-bit-bars-on-32-bit-platforms.patch41
3 files changed, 138 insertions, 0 deletions
diff --git a/pci/pci-bus-parity-status-sysfs-interface.patch b/pci/pci-bus-parity-status-sysfs-interface.patch
new file mode 100644
index 0000000000000..5c7c6ebdf6d08
--- /dev/null
+++ b/pci/pci-bus-parity-status-sysfs-interface.patch
@@ -0,0 +1,65 @@
+From norsk5@yahoo.com Wed Jun 14 17:06:36 2006
+Message-ID: <20060614235948.44337.qmail@web50114.mail.yahoo.com>
+Date: Wed, 14 Jun 2006 16:59:48 -0700 (PDT)
+From: Doug Thompson <norsk5@yahoo.com>
+To: Greg K-H <greg@kroah.com>
+Subject: PCI: Bus Parity Status sysfs interface
+
+
+From: Doug Thompson <norsk5@yahoo.com>
+
+This patch adds the 'broken_parity_status' sysfs attribute file to a PCI device.
+Reading this attribute a userland program can determine if PCI device provides false
+positives (value of 1) in its generation of PCI Parity status, or not (value of 0).
+As PCI devices are found to be 'bad' in this regard, userland programs can also set
+the appropriate value (root access only) of a faulty device. This per device
+information will be used in the EDAC PCI Parity scanner code in a future patch once
+this interface becomes available.
+
+Signed-off-by: Doug Thompson <norsk5@yahoo.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/pci/pci-sysfs.c | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+--- gregkh-2.6.orig/drivers/pci/pci-sysfs.c
++++ gregkh-2.6/drivers/pci/pci-sysfs.c
+@@ -45,6 +45,28 @@ pci_config_attr(class, "0x%06x\n");
+ pci_config_attr(irq, "%u\n");
+ pci_config_attr(is_enabled, "%u\n");
+
++static ssize_t broken_parity_status_show(struct device *dev,
++ struct device_attribute *attr,
++ char *buf)
++{
++ struct pci_dev *pdev = to_pci_dev(dev);
++ return sprintf (buf, "%u\n", pdev->broken_parity_status);
++}
++
++static ssize_t broken_parity_status_store(struct device *dev,
++ struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct pci_dev *pdev = to_pci_dev(dev);
++ ssize_t consumed = -EINVAL;
++
++ if ((count > 0) && (*buf == '0' || *buf == '1')) {
++ pdev->broken_parity_status = *buf == '1' ? 1 : 0;
++ consumed = count;
++ }
++ return consumed;
++}
++
+ static ssize_t local_cpus_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+ {
+@@ -122,6 +144,8 @@ struct device_attribute pci_dev_attrs[]
+ __ATTR_RO(local_cpus),
+ __ATTR_RO(modalias),
+ __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
++ __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
++ broken_parity_status_show,broken_parity_status_store),
+ __ATTR_NULL,
+ };
+
diff --git a/pci/pci-fix-memory-leak-in-mmconfig-error-path.patch b/pci/pci-fix-memory-leak-in-mmconfig-error-path.patch
new file mode 100644
index 0000000000000..2d72cfd7cb7fa
--- /dev/null
+++ b/pci/pci-fix-memory-leak-in-mmconfig-error-path.patch
@@ -0,0 +1,32 @@
+From darnok@68k.org Thu Jun 15 09:08:35 2006
+Date: Thu, 15 Jun 2006 12:08:30 -0400
+From: Konrad Rzeszutek <konradr@redhat.com>
+To: Greg KH <greg@kroah.com>
+Subject: PCI: fix memory leak in MMCONFIG error path
+Message-ID: <20060615160830.GD3242@andromeda.dapyr.net>
+Content-Disposition: inline
+
+This a bit late (yours patch was posted about a year ago), but
+a co-worker of spotted part of the code that looks like a memory
+leak. Looking at the code it seems that pci_mmcfg_config should
+be free-ed if MMCONFIG is above 4GB.
+
+
+From: Konrad Rzeszutek <konradr@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/i386/kernel/acpi/boot.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- gregkh-2.6.orig/arch/i386/kernel/acpi/boot.c
++++ gregkh-2.6/arch/i386/kernel/acpi/boot.c
+@@ -202,6 +202,8 @@ int __init acpi_parse_mcfg(unsigned long
+ if (mcfg->config[i].base_reserved) {
+ printk(KERN_ERR PREFIX
+ "MMCONFIG not in low 4GB of memory\n");
++ kfree(pci_mmcfg_config);
++ pci_mmcfg_config_num = 0;
+ return -ENODEV;
+ }
+ }
diff --git a/pci/pci-fix-to-pci-ignore-pre-set-64-bit-bars-on-32-bit-platforms.patch b/pci/pci-fix-to-pci-ignore-pre-set-64-bit-bars-on-32-bit-platforms.patch
new file mode 100644
index 0000000000000..20cecfb1eadee
--- /dev/null
+++ b/pci/pci-fix-to-pci-ignore-pre-set-64-bit-bars-on-32-bit-platforms.patch
@@ -0,0 +1,41 @@
+From hpa@c2micro.com Fri Jun 9 11:28:41 2006
+Message-ID: <4489BDCD.4000400@c2micro.com>
+Date: Fri, 09 Jun 2006 11:28:29 -0700
+From: "H. Peter Anvin" <hpa@c2micro.com>
+To: Bjorn Helgaas <bjorn.helgaas@hp.com>
+Cc: Andrew Morton <akpm@osdl.org>, Greg KH <greg@kroah.com>, mchan@broadcom.com
+Subject: PCI: fix to pci ignore pre-set 64-bit bars on 32-bit platforms
+
+From: Bjorn Helgaas <bjorn.helgaas@hp.com>
+
+When we detect a 64-bit pre-set address in a BAR on a 32-bit platform,
+we disable it and treat it as if it had been unset, thus allowing the
+general address assignment code to assign a new address to it when the
+device is enabled. This can happen either if the firmware assigns
+64-bit addresses; additionally, some cards have been found "in the
+wild" which do not come out of reset with all the BAR registers set to
+zero.
+
+Unfortunately, the patch that implemented this tested the low part of
+the address instead of the high part of the address. This patch fixes
+that.
+
+Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
+Signed-off-by: H. Peter Anvin <hpa@zytor.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/pci/probe.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- gregkh-2.6.orig/drivers/pci/probe.c
++++ gregkh-2.6/drivers/pci/probe.c
+@@ -199,7 +199,7 @@ static void pci_read_bases(struct pci_de
+ printk(KERN_ERR "PCI: Unable to handle 64-bit BAR for device %s\n", pci_name(dev));
+ res->start = 0;
+ res->flags = 0;
+- } else if (l) {
++ } else if (lhi) {
+ /* 64-bit wide address, treat as disabled */
+ pci_write_config_dword(dev, reg, l & ~(u32)PCI_BASE_ADDRESS_MEM_MASK);
+ pci_write_config_dword(dev, reg+4, 0);