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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2024-03-17 22:52:16 +0100 |
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committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2024-04-22 12:42:26 +0200 |
commit | f69b5364064d0437b8c5f9b1501cf8fca2e65f9c (patch) | |
tree | 6b48adefca5acd16178a2a5eeaf791b71b3f8bfb | |
parent | 2796bae3b0adb129cffdfcd10df2a27326b48cfc (diff) | |
download | renesas-drivers-f69b5364064d0437b8c5f9b1501cf8fca2e65f9c.tar.gz |
pwm: stm32: Calculate prescaler with a division instead of a loop
Notice: this object is not reachable from any branch.
Instead of looping over increasing values for the prescaler and testing
if it's big enough, calculate the value using a single division.
Link: https://lore.kernel.org/r/498a44b313a6c0a84ccddd03cd67aadaaaf7daf2.1710711976.git.u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Notice: this object is not reachable from any branch.
-rw-r--r-- | drivers/pwm/pwm-stm32.c | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index ea3d7d9117f2c2..a2f231d13a9f7c 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -311,29 +311,33 @@ unlock: static int stm32_pwm_config(struct stm32_pwm *priv, unsigned int ch, u64 duty_ns, u64 period_ns) { - unsigned long long prd, div, dty; - unsigned int prescaler = 0; + unsigned long long prd, dty; + unsigned long long prescaler; u32 ccmr, mask, shift; /* * .probe() asserted that clk_get_rate() is not bigger than 1 GHz, so - * this won't overflow. + * the calculations here won't overflow. + * First we need to find the minimal value for prescaler such that + * + * period_ns * clkrate + * ------------------------------ + * NSEC_PER_SEC * (prescaler + 1) + * + * isn't bigger than max_arr. */ - div = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), - NSEC_PER_SEC); - prd = div; - - while (div > priv->max_arr) { - prescaler++; - div = prd; - do_div(div, prescaler + 1); - } - prd = div; + prescaler = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), + (u64)NSEC_PER_SEC * priv->max_arr); + if (prescaler > 0) + prescaler -= 1; if (prescaler > MAX_TIM_PSC) return -EINVAL; + prd = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), + (u64)NSEC_PER_SEC * (prescaler + 1)); + /* * All channels share the same prescaler and counter so when two * channels are active at the same time we can't change them |