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path: root/patches.at91/0233-ARM-at91-DT-add-i2c-mmc-nand-pinctrl-in-device-tree-.patch
blob: 954f5f1bc57745e829473a07a01b5c1982bff602 (plain)
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From f3a49662b5055a2e766d0a9f327c51781f463283 Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Fri, 19 Oct 2012 07:14:06 +0800
Subject: ARM: at91/DT: add i2c mmc nand pinctrl in device tree support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 arch/arm/boot/dts/at91sam9x5.dtsi   | 132 +++++++++++++++++++++++++++++++-----
 arch/arm/boot/dts/at91sam9x5ek.dtsi |  24 ++++---
 arch/arm/mach-at91/board-dt.c       |  27 --------
 3 files changed, 130 insertions(+), 53 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 7cefc2c..726bb82 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -151,8 +151,8 @@
 
 					pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
 						atmel,pins =
-							<3 27 0x3 0x0	/* PC27 periph C */
-							 3 28 0x3 0x0>;	/* PC28 periph C */
+							<2 27 0x3 0x0	/* PC27 periph C */
+							 2 28 0x3 0x0>;	/* PC28 periph C */
 					};
 				};
 
@@ -165,46 +165,134 @@
 
 					pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
 						atmel,pins =
-							<0 0 0x2 0x0	/* PB0 periph B */
-							 0 1 0x2 0x0>;	/* PB1 periph B */
+							<1 0 0x2 0x0	/* PB0 periph B */
+							 1 1 0x2 0x0>;	/* PB1 periph B */
 					};
 				};
 
 				uart3 {
 					pinctrl_uart3: uart3-0 {
 						atmel,pins =
-							<3 23 0x2 0x1	/* PC22 periph B with pullup */
-							 3 23 0x2 0x0>;	/* PC23 periph B */
+							<2 22 0x2 0x1	/* PC22 periph B with pullup */
+							 2 23 0x2 0x0>;	/* PC23 periph B */
 					};
 
 					pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
 						atmel,pins =
-							<3 24 0x2 0x0	/* PC24 periph B */
-							 3 25 0x2 0x0>;	/* PC25 periph B */
+							<2 24 0x2 0x0	/* PC24 periph B */
+							 2 25 0x2 0x0>;	/* PC25 periph B */
 					};
 				};
 
 				usart0 {
 					pinctrl_usart0: usart0-0 {
 						atmel,pins =
-							<3 8 0x3 0x0	/* PC8 periph C */
-							 3 9 0x3 0x1>;	/* PC9 periph C with pullup */
+							<2 8 0x3 0x0	/* PC8 periph C */
+							 2 9 0x3 0x1>;	/* PC9 periph C with pullup */
 					};
 				};
 
 				usart1 {
 					pinctrl_usart1: usart1-0 {
 						atmel,pins =
-							<3 16 0x3 0x0	/* PC16 periph C */
-							 3 17 0x3 0x1>;	/* PC17 periph C with pullup */
+							<2 16 0x3 0x0	/* PC16 periph C */
+							 2 17 0x3 0x1>;	/* PC17 periph C with pullup */
 					};
 				};
 
 				nand {
-					pinctrl_nand: nand-0 {
+					pinctrl_nand_rdy_enable: nand_rdy_enable-0 {
 						atmel,pins =
-							<3 4 0x0 0x1	/* PD5 gpio RDY pin pull_up */
-							 3 5 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
+							<3 5 0x0 0x1	/* PD5 gpio RDY pin pull_up */
+							 3 4 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
+					};
+
+					pinctrl_nand_oe_we_ale_cle: nand_oe_we_ale_cle-0 {
+						atmel,pins =
+							<3 0 0x1 0x1	/* PD0 periph A with pullup */
+							 3 1 0x1 0x1	/* PD1 periph A with pullup */
+							 3 2 0x1 0x1	/* PD2 periph A with pullup */
+							 3 3 0x1 0x1>;	/* PD3 periph A with pullup */
+					};
+
+					pinctrl_nand_bus_on_d16_8bit: nand_bus_on_d16_8bit-0 {
+						atmel,pins =
+							<3 6 0x1 0x1	/* PD6 periph A with pullup */
+							 3 7 0x1 0x1	/* PD7 periph A with pullup */
+							 3 8 0x1 0x1	/* PD8 periph A with pullup */
+							 3 9 0x1 0x1	/* PD9 periph A with pullup */
+							 3 10 0x1 0x1	/* PD10 periph A with pullup */
+							 3 11 0x1 0x1	/* PD11 periph A with pullup */
+							 3 12 0x1 0x1	/* PD12 periph A with pullup */
+							 3 13 0x1 0x1>;	/* PD13 periph A with pullup */
+					};
+
+					pinctrl_nand_bus_on_d16_16bit: nand_bus_on_d16_16bit-0 {
+						atmel,pins =
+							<3 14 0x1 0x1	/* PD14 periph A with pullup */
+							 3 15 0x1 0x1	/* PD15 periph A with pullup */
+							 3 16 0x1 0x1	/* PD16 periph A with pullup */
+							 3 17 0x1 0x1	/* PD17 periph A with pullup */
+							 3 18 0x1 0x1	/* PD18 periph A with pullup */
+							 3 19 0x1 0x1	/* PD19 periph A with pullup */
+							 3 20 0x1 0x1	/* PD20 periph A with pullup */
+							 3 21 0x1 0x1>;	/* PD21 periph A with pullup */
+					};
+				};
+
+				i2c0 {
+					pinctrl_i2c0: i2c0-0 {
+						atmel,pins =
+							<0 30 0x1 0x2	/* PA30 periph A Multidrive */
+							 0 31 0x1 0x3>;	/* PA31 periph A Multidrive with pullup */
+					};
+				};
+
+				i2c1 {
+					pinctrl_i2c1: i2c1-0 {
+						atmel,pins =
+							<2 0 0x3 0x2	/* PC0 periph C Multidrive */
+							 2 1 0x3 0x3>;	/* PC1 periph C Multidrive with pullup */
+					};
+				};
+
+				i2c2 {
+					pinctrl_i2c2: i2c2-0 {
+						atmel,pins =
+							<1 4 0x2 0x2	/* PB4 periph B Multidrive */
+							 1 5 0x2 0x3>;	/* PB5 periph B Multidrive with pullup */
+					};
+				};
+
+				mmc0 {
+					pinctrl_mmc0_clk_cmd_dat0: mm0_clk_cmd_dat0 {
+						atmel,pins =
+							<0 17 0x1 0x0	/* PA17 periph A */
+							 0 16 0x1 0x1	/* PA16 periph A with pullpup */
+							 0 15 0x1 0x1>;	/* PA15 periph A with pullpup */
+					};
+
+					pinctrl_mmc0_dat1_3: mm0_dat1_3 {
+						atmel,pins =
+							<0 18 0x1 0x1	/* PA18 periph A with pullpup  */
+							 0 19 0x1 0x1	/* PA19 periph A with pullpup */
+							 0 20 0x1 0x1>;	/* PA20 periph A with pullpup */
+					};
+				};
+
+				mmc1 {
+					pinctrl_mmc1_clk_cmd_dat0: mm1_clk_cmd_dat0 {
+						atmel,pins =
+							<0 13 0x2 0x0	/* PA13 periph B */
+							 0 12 0x2 0x1	/* PA12 periph B with pullpup */
+							 0 11 0x2 0x1>;	/* PA11 periph B with pullpup */
+					};
+
+					pinctrl_mmc1_dat1_3: mm1_dat1_3 {
+						atmel,pins =
+							<0 2 0x2 0x1	/* PA2 periph B with pullpup  */
+							 0 3 0x2 0x1	/* PA3 periph B with pullpup */
+							 0 4 0x2 0x1>;	/* PA4 periph B with pullpup */
 					};
 				};
 
@@ -311,20 +399,22 @@
 				compatible = "atmel,hsmci";
 				reg = <0xf0008000 0x600>;
 				interrupts = <12 4 0>;
-				status = "disabled";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				dma = <&dma0 0x10002200>;
+				pinctrl-names = "default";
+				status = "disabled";
 			};
 
 			mmc1: mmc@f000c000 {
 				compatible = "atmel,hsmci";
 				reg = <0xf000c000 0x600>;
 				interrupts = <26 4 0>;
-				status = "disabled";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				dma = <&dma1 0x10002200>;
+				pinctrl-names = "default";
+				status = "disabled";
 			};
 
 			i2c0: i2c@f8010000 {
@@ -334,6 +424,8 @@
 				dma = <&dma0 0x10002278>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c0>;
 				status = "disabled";
 			};
 
@@ -344,6 +436,8 @@
 				dma = <&dma1 0x10002256>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c1>;
 				status = "disabled";
 			};
 
@@ -354,6 +448,8 @@
 				dma = <&dma0 0x1000229A>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2c2>;
 				status = "disabled";
 			};
 
@@ -393,7 +489,7 @@
 			atmel,nand-addr-offset = <21>;
 			atmel,nand-cmd-offset = <22>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_nand>;
+			pinctrl-0 = <&pinctrl_nand_rdy_enable &pinctrl_nand_oe_we_ale_cle>;
 			gpios = <&pioD 5 0
 				 &pioD 4 0
 				 0
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 8854794..0406e0d 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -18,6 +18,20 @@
 
 	ahb {
 		apb {
+			pinctrl@fffff400 {
+				board {
+					pinctrl_mmc0_cd: mmc0_cd {
+						atmel,pins =
+							<3 15 0x0 0x5>;	/* PD15 gpio with pullup deglitch */
+					};
+
+					pinctrl_mmc1_cd: mmc1_cd {
+						atmel,pins =
+							<3 14 0x0 0x5>;	/* PD14 gpio with pullup deglitch */
+					};
+				};
+			};
+
 			dbgu: serial@fffff200 {
 				status = "okay";
 			};
@@ -27,6 +41,7 @@
 			};
 
 			mmc0: mmc@f0008000 {
+				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
 				status = "okay";
 				slot@0 {
 					reg = <0>;
@@ -36,6 +51,7 @@
 			};
 
 			mmc1: mmc@f000c000 {
+				pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
 				slot@0 {
 					reg = <0>;
 					bus-width = <4>;
@@ -55,14 +71,6 @@
 			i2c0: i2c@f8010000 {
 				status = "okay";
 			};
-
-			i2c1: i2c@f8014000 {
-				status = "okay";
-			};
-
-			i2c2: i2c@f8018000 {
-				status = "okay";
-			};
 		};
 
 		usb0: ohci@00600000 {
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index b1a5d3c..95798f5 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -139,36 +139,9 @@ static void __init at91_dt_device_init(void)
 {
 	/* Temporary pin mux stuff */
 	if (of_machine_is_compatible("atmel,at91sam9x5")) {
-		at91_set_A_periph(AT91_PIN_PA30, 0);    /* TWD */
-		at91_set_A_periph(AT91_PIN_PA31, 0);    /* TWCK */
-		printk("AT91: i2c pin mux done\n");
 		at91_set_gpio_input(AT91_PIN_PA7, 1);
 		printk("AT91: qt1070 pin mux done\n");
 
-		at91_set_gpio_input(AT91_PIN_PD14, 1);
-		at91_set_deglitch(AT91_PIN_PD14, 1);
-		at91_set_gpio_input(AT91_PIN_PD15, 1);
-		at91_set_deglitch(AT91_PIN_PD15, 1);
-		/* CLK */
-		at91_set_A_periph(AT91_PIN_PA17, 0);
-		/* CMD */
-		at91_set_A_periph(AT91_PIN_PA16, 1);
-		/* DAT0, DAT1..DAT3 */
-		at91_set_A_periph(AT91_PIN_PA15, 1);
-		at91_set_A_periph(AT91_PIN_PA18, 1);
-		at91_set_A_periph(AT91_PIN_PA19, 1);
-		at91_set_A_periph(AT91_PIN_PA20, 1);
-		/* CLK */
-		at91_set_B_periph(AT91_PIN_PA13, 0);
-		/* CMD */
-		at91_set_B_periph(AT91_PIN_PA12, 1);
-		/* DAT0, DAT1..DAT3 */
-		at91_set_B_periph(AT91_PIN_PA11, 1);
-		at91_set_B_periph(AT91_PIN_PA2, 1);
-		at91_set_B_periph(AT91_PIN_PA3, 1);
-		at91_set_B_periph(AT91_PIN_PA4, 1);
-		printk("AT91: mci0/1 pin mux done\n");
-
 		at91sam9x5_pinmux_lcd();
 	}
 
-- 
1.8.0.197.g5a90748