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-rw-r--r--patches.renesas/0249-sh-pfc-r8a7790-remove-non-existing-GPIO-pins.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/patches.renesas/0249-sh-pfc-r8a7790-remove-non-existing-GPIO-pins.patch b/patches.renesas/0249-sh-pfc-r8a7790-remove-non-existing-GPIO-pins.patch
new file mode 100644
index 00000000000000..958b18155a72ba
--- /dev/null
+++ b/patches.renesas/0249-sh-pfc-r8a7790-remove-non-existing-GPIO-pins.patch
@@ -0,0 +1,53 @@
+From 0a137085a31097b4a7991c8e6b114117600f9e20 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 26 Jun 2015 01:42:04 +0300
+Subject: [PATCH 249/326] sh-pfc: r8a7790: remove non-existing GPIO pins
+
+GPIO banks 1 and 2 are missing pins 30 and 31. Remove them.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit b5599df20f1ee45cef811a7ab1c7358d9faf7bf8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 21 +++++++++++++++++++--
+ 1 file changed, 19 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+index baab81ead9ff..fc344a7c2b53 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+@@ -27,10 +27,27 @@
+ #include "core.h"
+ #include "sh_pfc.h"
+
++#define PORT_GP_30(bank, fn, sfx) \
++ PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
++ PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
++ PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
++ PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
++ PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
++ PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
++ PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
++ PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
++ PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
++ PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
++ PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
++ PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
++ PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
++ PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
++ PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx)
++
+ #define CPU_ALL_PORT(fn, sfx) \
+ PORT_GP_32(0, fn, sfx), \
+- PORT_GP_32(1, fn, sfx), \
+- PORT_GP_32(2, fn, sfx), \
++ PORT_GP_30(1, fn, sfx), \
++ PORT_GP_30(2, fn, sfx), \
+ PORT_GP_32(3, fn, sfx), \
+ PORT_GP_32(4, fn, sfx), \
+ PORT_GP_32(5, fn, sfx)
+--
+2.6.2
+