diff options
Diffstat (limited to 'patches.renesas/0247-pinctrl-sh-pfc-r8a7794-add-MMCIF-pin-groups.patch')
| -rw-r--r-- | patches.renesas/0247-pinctrl-sh-pfc-r8a7794-add-MMCIF-pin-groups.patch | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/patches.renesas/0247-pinctrl-sh-pfc-r8a7794-add-MMCIF-pin-groups.patch b/patches.renesas/0247-pinctrl-sh-pfc-r8a7794-add-MMCIF-pin-groups.patch new file mode 100644 index 00000000000000..d89bb834546865 --- /dev/null +++ b/patches.renesas/0247-pinctrl-sh-pfc-r8a7794-add-MMCIF-pin-groups.patch @@ -0,0 +1,100 @@ +From afc12d8a8d3d452212d13bb4f6d47a3033b37901 Mon Sep 17 00:00:00 2001 +From: Shinobu Uehara <shinobu.uehara.xc@renesas.com> +Date: Sat, 6 Jun 2015 01:35:54 +0300 +Subject: [PATCH 247/326] pinctrl: sh-pfc: r8a7794: add MMCIF pin groups + +Add MMCIF pin groups to R8A7794 PFC driver. + +Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> +[Sergei: rebased, renamed, added changelog.] +Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> +Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> + +(cherry picked from commit f1f74b640c952e311aebaa594d9d81fecb72cc17) +Signed-off-by: Simon Horman <horms+renesas@verge.net.au> +--- + drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 46 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 46 insertions(+) + +diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c +index 0e2686a2093c..4679ca01f976 100644 +--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c ++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c +@@ -1919,6 +1919,40 @@ static const unsigned int intc_irq9_pins[] = { + static const unsigned int intc_irq9_mux[] = { + IRQ9_MARK, + }; ++/* - MMCIF ------------------------------------------------------------------ */ ++static const unsigned int mmc_data1_pins[] = { ++ /* D[0] */ ++ RCAR_GP_PIN(6, 18), ++}; ++static const unsigned int mmc_data1_mux[] = { ++ MMC_D0_MARK, ++}; ++static const unsigned int mmc_data4_pins[] = { ++ /* D[0:3] */ ++ RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19), ++ RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21), ++}; ++static const unsigned int mmc_data4_mux[] = { ++ MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK, ++}; ++static const unsigned int mmc_data8_pins[] = { ++ /* D[0:7] */ ++ RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19), ++ RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21), ++ RCAR_GP_PIN(6, 22), RCAR_GP_PIN(6, 23), ++ RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), ++}; ++static const unsigned int mmc_data8_mux[] = { ++ MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK, ++ MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK, ++}; ++static const unsigned int mmc_ctrl_pins[] = { ++ /* CLK, CMD */ ++ RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 17), ++}; ++static const unsigned int mmc_ctrl_mux[] = { ++ MMC_CLK_MARK, MMC_CMD_MARK, ++}; + /* - MSIOF0 ----------------------------------------------------------------- */ + static const unsigned int msiof0_clk_pins[] = { + /* SCK */ +@@ -2683,6 +2717,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(intc_irq7), + SH_PFC_PIN_GROUP(intc_irq8), + SH_PFC_PIN_GROUP(intc_irq9), ++ SH_PFC_PIN_GROUP(mmc_data1), ++ SH_PFC_PIN_GROUP(mmc_data4), ++ SH_PFC_PIN_GROUP(mmc_data8), ++ SH_PFC_PIN_GROUP(mmc_ctrl), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), +@@ -2869,6 +2907,13 @@ static const char * const intc_groups[] = { + "intc_irq9", + }; + ++static const char * const mmc_groups[] = { ++ "mmc_data1", ++ "mmc_data4", ++ "mmc_data8", ++ "mmc_ctrl", ++}; ++ + static const char * const msiof0_groups[] = { + "msiof0_clk", + "msiof0_sync", +@@ -3035,6 +3080,7 @@ static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(i2c3), + SH_PFC_FUNCTION(i2c4), + SH_PFC_FUNCTION(intc), ++ SH_PFC_FUNCTION(mmc), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), +-- +2.6.2 + |