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| author | openeuler-ci-bot <george@openeuler.sh> | 2024-03-05 11:32:36 +0000 |
|---|---|---|
| committer | Gitee <noreply@gitee.com> | 2024-03-05 11:32:36 +0000 |
| commit | 7e0525dce5857b1e13ccc8663e129efc6e0a8fa3 (patch) | |
| tree | fc00465f03f1ccbe618d3c293dd334a576f37cd0 | |
| parent | 39ffc419f66936daad2c1bbcd9d2e315f04b49b4 (diff) | |
| parent | 7f5917da48dd9f50ca7170356efbdb4cadf3c47c (diff) | |
| download | openEuler-kernel-openEuler-20.03-LTS-SP3.tar.gz | |
!4950 arm64: head.S: always initialize PSTATEopenEuler-20.03-LTS-SP3
Merge Pull Request from: @ci-robot
PR sync from: Li Zetao <lizetao1@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/MXC66ZXKFV2FNFEACXCTN3PD7V742GXJ/
https://gitee.com/openeuler/kernel/issues/I95U8R
Link:https://gitee.com/openeuler/kernel/pulls/4950
Reviewed-by: Zhang Jianhua <chris.zjh@huawei.com>
Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com>
| -rw-r--r-- | arch/arm64/include/asm/ptrace.h | 5 | ||||
| -rw-r--r-- | arch/arm64/kernel/head.S | 25 |
2 files changed, 21 insertions, 9 deletions
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index f1662df255caf4..408bc4719f3b24 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -27,6 +27,11 @@ #define CurrentEL_EL1 (1 << 2) #define CurrentEL_EL2 (2 << 2) +#define INIT_PSTATE_EL1 \ + (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h) +#define INIT_PSTATE_EL2 \ + (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h) + /* * PMR values used to mask/unmask interrupts. * diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 9f083b11efe255..04dc533ea8b603 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -465,19 +465,24 @@ ENTRY(kimage_vaddr) * If we're fortunate enough to boot at EL2, ensure that the world is * sane before dropping to EL1. * + * Since we cannot always rely on ERET synchronizing writes to sysregs (e.g. if + * SCTLR_ELx.EOS is clear), we place an ISB prior to ERET. + * * Returns either BOOT_CPU_MODE_EL1 or BOOT_CPU_MODE_EL2 in w0 if * booted in EL1 or EL2 respectively. */ ENTRY(el2_setup) - msr SPsel, #1 // We want to use SP_EL{1,2} mrs x0, CurrentEL cmp x0, #CurrentEL_EL2 b.eq 1f mov_q x0, (SCTLR_EL1_RES1 | ENDIAN_SET_EL1) msr sctlr_el1, x0 - mov w0, #BOOT_CPU_MODE_EL1 // This cpu booted in EL1 isb - ret + mov_q x0, INIT_PSTATE_EL1 + msr spsr_el1, x0 + msr elr_el1, lr + mov w0, #BOOT_CPU_MODE_EL1 + eret 1: mov_q x0, (SCTLR_EL2_RES1 | ENDIAN_SET_EL2) msr sctlr_el2, x0 @@ -588,9 +593,12 @@ set_hcr: cbz x2, install_el2_stub - mov w0, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2 isb - ret + mov_q x0, INIT_PSTATE_EL2 + msr spsr_el2, x0 + msr elr_el2, lr + mov w0, #BOOT_CPU_MODE_EL2 + eret install_el2_stub: /* @@ -622,12 +630,11 @@ install_el2_stub: 7: adr_l x0, __hyp_stub_vectors msr vbar_el2, x0 - /* spsr */ - mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\ - PSR_MODE_EL1h) + isb + mov x0, #INIT_PSTATE_EL1 msr spsr_el2, x0 msr elr_el2, lr - mov w0, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2 + mov w0, #BOOT_CPU_MODE_EL2 eret ENDPROC(el2_setup) |